usb rtl code, to fpga or asic

源代码在线查看: usb_new_synchronizer_ent.vhdl

软件大小: 154 K
上传用户: eeworm
关键词: code asic fpga usb
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相关代码

				--------------------------------------------------------------------------------
				--
				--  P H I L I P S  C O M P A N Y  R E S T R I C T E D
				--                                         
				--  Copyright (c) 1998.                    
				--
				--  Philips Electronics N.V.
				--
				--  Philips Semiconductors
				--  Interconnectivity and Processor Peripheral group
				--  Bangalore,India
				--  All rights reserved. Reproduction in whole or in part is prohibited
				--  without the written permission of the copyright owner.
				--
				--------------------------------------------------------------------------------
				--
				--  File            : usb_new_synchronizer_ent.vhdl 
				--
				--  Module          : Synchronizer 
				--
				--  Project         : VPB bus Interface to USB 1.1 Device(USBFS22)
				--
				--  Author          :              
				--
				--  Description     : The entity of synchronizer block
				--
				--  Status          : 
				--
				--  Contact address : 
				--
				--------------------------------------------------------------------------------
				
				library IEEE;
				use IEEE.std_logic_1164.all;
				use IEEE.numeric_std.all;
				
				library work;
				use work.PCK_GENERAL.all;
				use work.PCK_HANDLERS.all;
				
				library work;
				use work.PCK_APB.all; 
				
				entity SYNCHRONIZER is
				  port(
				
				       -- Interface to EP_HANDLER modlue
				
				       Trans_Enable:          in   one_bit;              -- Data transfer enable
				       Read:                  in   one_bit;              -- '1' read data
				       EP_number:             in   Int_EndPointType;     -- Physical endpoint number
				       Data_Out:              in   byte;                 -- Data bus for OUT endpoints
				       End_Transfer:          in   one_bit;              -- End of transfer for packet data 
				       EndTransfer_Cmd:       in   one_bit;              -- End of transfer for command data
				       USBEp0Intr_Set:        in   one_bit;              -- USB Ep0 interrupt
				       USBEp1Intr_Set:        in   one_bit;              -- USB Ep1 interrupt
				       USBEp2Intr_Set:        in   one_bit;              -- USB Ep2 interrupt
				       USBEp3Intr_Set:        in   one_bit;              -- USB Ep3 interrupt
				       USBEp4Intr_Set:        in   one_bit;              -- USB Ep4 interrupt
				       USBEp5Intr_Set:        in   one_bit;              -- USB Ep5 interrupt
				       USBEp6Intr_Set:        in   one_bit;              -- USB Ep6 interrupt
				       USBEp7Intr_Set:        in   one_bit;              -- USB Ep7 interrupt
				       USBDevIntr_Set:        in   one_bit;              -- USB Dev interrupt       
				       USBToggleBuffer:       in   T_ToggleArray;        -- USB buffer toggle 
				       UCToggleBuffer:        in   T_ToggleArray;        -- UC buffer toggle
				       FullBuffer_UC:         in   T_Full;               -- Buffer full for endpoints
				       PI_IsoToggle:          in   integer range 0 to 1; -- ISO buffer toggle
				       RxError:               in   boolean;              -- Error in packet transfer
				       reg_ram_read:          in   one_bit;              -- Start of IN transfer
				       reg_ram_tag:           in   Int_EndPointType;     -- Physical endpoint number
				       CommandData:           in   byte;                 -- Command data
				       CmdDataValid:          in   boolean;              -- Command data valid
				       CmdAccept:             in   boolean;              -- Handshake signal for Command accepted
				       CommandCodeChannel:    out  eleven_bits;          -- Command code
				       CmdCodeValid_Out:      out  boolean;              -- Command code valid
				       If_Busy:               out  boolean;              -- Interface busy
				       
				       -- Interface to USB_CNTRL module
				
				       CommandCode:           in   eleven_bits;          -- Command code
				       CmdCodeValid:          in   boolean;              -- Command code valid
				       CmdAccept_Out:         out  boolean;              -- Command code accepted
				       CommandDataChannel:    out  byte;                 -- Command data
				       CmdDataValid_Out:      out  boolean;              -- Command data valid
				       USBEp0IntrSet:         out  one_bit;              -- USB Ep0 interrupt
				       USBEp1IntrSet:         out  one_bit;              -- USB Ep1 interrupt 
				       USBEp2IntrSet:         out  one_bit;              -- USB Ep2 interrupt 
				       USBEp3IntrSet:         out  one_bit;              -- USB Ep3 interrupt
				       USBEp4IntrSet:         out  one_bit;              -- USB Ep4 interrupt 
				       USBEp5IntrSet:         out  one_bit;              -- USB Ep5 interrupt 
				       USBEp6IntrSet:         out  one_bit;              -- USB Ep6 interrupt
				       USBEp7IntrSet:         out  one_bit;              -- USB Ep7 interrupt 
				       USBDevIntrSet:         out  one_bit;              -- USB Dev interrupt        
				       FrameIntr_Set:         out  one_bit;              -- Frame interrupt
				       EndTransfer_Cmd_D:     out  one_bit;              -- End of transfer for command data
				
				       -- Interface to RCV_RAM module
				       
				       RxDataAccepted:        in   boolean;              -- Handshake: OUT EP data accepted 
				       RxCore_Data:           out  byte;                 -- Data for OUT endpoints
				       EP_number_Out:         out  Int_EndPointType;     -- Physical endpoint number
				       End_Transfer_D:        out  one_bit;              -- End of transfer for endpoint data
				       RxError_Out:           out  boolean;              -- Error in data packet
				       USBToggleBuffer_Out:   out  T_ToggleArray;        -- USB buffer toggle
				       UCToggleBuffer_Out:    out  T_ToggleArray;        -- UC buffer toggle
				       FullBuffer_EP:         out  T_Full;               -- Buffer full for endpoints
				       PI_IsoToggle_Out:      out  integer range 0 to 1; -- ISO buffer toggle
				       
				       -- Interface to TRNSMT_RAM module 
				       
				       Read_Data:             out  one_bit;              -- Read data from RAM
				       start_in_tx:           out  one_bit;              -- Start of IN transfer
				       TxDest_Endp:           out  Int_EndPointType;     -- Physical endpoint number of IN
				       
				       -- Clock and Reset from system 
				       
				       clk:                   in   one_bit;              -- APB bus clock
				       pvci_reset_n:          in   one_bit               -- APB bus Reset
				      );
				 end SYNCHRONIZER;
							

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