FPGA的串口模块

源代码在线查看: uart.tan.summary

软件大小: 462 K
上传用户: a14331510z
关键词: FPGA 串口 模块
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相关代码

				--------------------------------------------------------------------------------------
				Timing Analyzer Summary
				--------------------------------------------------------------------------------------
				
				Type           : Worst-case tsu
				Slack          : N/A
				Required Time  : None
				Actual Time    : 12.200 ns
				From           : txdbuf_in[0]
				To             : transfer:inst2|txds
				From Clock     : --
				To Clock       : clk32mhz
				Failed Paths   : 0
				
				Type           : Worst-case tco
				Slack          : N/A
				Required Time  : None
				Actual Time    : 21.100 ns
				From           : reciever:inst1|r_ready
				To             : rec_ready
				From Clock     : clk32mhz
				To Clock       : --
				Failed Paths   : 0
				
				Type           : Worst-case th
				Slack          : N/A
				Required Time  : None
				Actual Time    : 3.100 ns
				From           : rxd
				To             : reciever:inst1|state.r_center
				From Clock     : --
				To Clock       : clk32mhz
				Failed Paths   : 0
				
				Type           : Clock Setup: 'clk32mhz'
				Slack          : N/A
				Required Time  : None
				Actual Time    : 38.61 MHz ( period = 25.900 ns )
				From           : reciever:inst1|\pro2:rcnt[1]
				To             : reciever:inst1|\pro2:rcnt[30]
				From Clock     : clk32mhz
				To Clock       : clk32mhz
				Failed Paths   : 0
				
				Type           : Total number of failed paths
				Slack          : 
				Required Time  : 
				Actual Time    : 
				From           : 
				To             : 
				From Clock     : 
				To Clock       : 
				Failed Paths   : 0
				
				--------------------------------------------------------------------------------------
				
							

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