一个串口的完整FPGA工程

源代码在线查看: uart.tan.summary

软件大小: 2023 K
上传用户: archimedes88
关键词: FPGA 串口 工程
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相关代码

				--------------------------------------------------------------------------------------
				Timing Analyzer Summary
				--------------------------------------------------------------------------------------
				
				Type           : Worst-case tsu
				Slack          : N/A
				Required Time  : None
				Actual Time    : 11.622 ns
				From           : addr[5]
				To             : uart:U_2|rUBRR[9]
				From Clock     : --
				To Clock       : clk
				Failed Paths   : 0
				
				Type           : Worst-case tco
				Slack          : N/A
				Required Time  : None
				Actual Time    : 19.786 ns
				From           : ebi:U_1|rAddrL[2]
				To             : ad[3]
				From Clock     : ale
				To Clock       : --
				Failed Paths   : 0
				
				Type           : Worst-case tpd
				Slack          : N/A
				Required Time  : None
				Actual Time    : 16.978 ns
				From           : addr[5]
				To             : ad[0]
				From Clock     : --
				To Clock       : --
				Failed Paths   : 0
				
				Type           : Worst-case th
				Slack          : N/A
				Required Time  : None
				Actual Time    : -0.746 ns
				From           : rst_n
				To             : uart:U_2|rTxDoneClr
				From Clock     : --
				To Clock       : clk
				Failed Paths   : 0
				
				Type           : Clock Setup: 'clk'
				Slack          : N/A
				Required Time  : None
				Actual Time    : 163.05 MHz ( period = 6.133 ns )
				From           : uart:U_2|txd:U_transmitter|rTxBitCnt[1]
				To             : uart:U_2|txd:U_transmitter|rTxDatSft[6]
				From Clock     : clk
				To Clock       : clk
				Failed Paths   : 0
				
				Type           : Total number of failed paths
				Slack          : 
				Required Time  : 
				Actual Time    : 
				From           : 
				To             : 
				From Clock     : 
				To Clock       : 
				Failed Paths   : 0
				
				--------------------------------------------------------------------------------------
				
							

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