--------------------------------------------------------------------------------
--
-- P H I L I P S C O M P A N Y R E S T R I C T E D
--
-- Copyright (c) 1998.
--
-- Philips Electronics N.V.
--
-- Philips Semiconductors
-- Interconnectivity and Processor Peripheral group
-- Bangalore, India
-- All rights reserved. Reproduction in whole or in part is prohibited
-- without the written permission of the copyright owner.
--
--------------------------------------------------------------------------------
--
-- File : usb_new_ep_handler_rtl.vhdl
--
-- Module : EP_HANDLER
--
-- Project : VPB bus interface to USB 1.1 device (USBFS22)
--
-- Author :
--
-- Description : The Architecture of EP handler
--
-- Contact address : sanjeev@blr.sc.philips.com
--
--------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
library work;
use work.PCK_GENERAL.all;
use work.PCK_CONFIGURATION.all;
use work.PCK_HANDLERS.all;
library work;
use work.PCK_APB.all;
ARCHITECTURE rtl OF ep_handler IS
signal EndTransfer_Cmd_I: one_bit;
signal Read_I: one_bit;
signal read_4T : one_bit;
signal DataFromUC_I: T_UC_to_Handlers;
signal DataToUC_Buffer: byte;
signal count_state: Int_TwoBits;
signal trans_enable_I: one_bit;
signal DataToUC_Buffer_Rdy: boolean;
signal ReadCmdData: boolean; -- Read Command Data
signal CmdDataValid_I: boolean;
signal CmdDecode: boolean;
signal CmdAccept_I: boolean;
signal ReadNdata: boolean;
signal CmdCodeValid_Out_Q: boolean;
signal if_busy_Q: boolean;
signal read_req_Q: one_bit;
signal read_req_2Q: one_bit;
signal Rx_N_Data_i: integer range 0 to MAX_OVERFLOW_SIZE;
signal CmdCodeValid_Out_2Q: boolean;
signal EndPointNr: Int_EndPointType;
-----------------------------------------------------------------------------
-- This is to supply certain command codes to UC handler.
procedure send_command_code (variable CommandCode : in eleven_bits;
signal DataFromUC_I : out T_UC_to_Handlers) is
begin
DataFromUC_I.Address if(CommandCode(9) = '1') then
DataFromUC_I.read else
DataFromUC_I.read end if;
if(CommandCode(8) = '1') then
DataFromUC_I.write else
DataFromUC_I.write end if;
DataFromUC_I.Data end send_command_code ;
------------------------------------------------------------------------------
begin
-- initialising the ring
DataToUC_out EndTransfer_Cmd Rx_N_data Read DataFromUC trans_enable USBEp0Intr_Set USBEp1Intr_Set USBEp2Intr_Set USBEp3Intr_Set USBEp4Intr_Set USBEp5Intr_Set USBEp6Intr_Set USBEp7Intr_Set USBDevIntr_Set
FullBuffer_UC USBToggleBuffer UCToggleBuffer RxError PI_IsoToggle CmdAccept CmdDataValid reg_ram_tag
process(FsClk, reset_n)
variable DataToSystem: byte;
variable OutEndPoint: Int_EndPointType;
variable ValidData: boolean;
variable CommandCode: eleven_bits;
variable CommandFromSystem: eleven_bits;
variable count: integer range 0 to 4;
begin
-- asynchrnous reset for all registers.
if(reset_n = '0') then
ValidData := false;
DataToSystem := (others => '0');
EndPointNr EndTransfer_Cmd_I trans_enable_I Read_I Read_4T data_out '0');
count_state DataToUC_Buffer '0');
DataFromUC_I.write DataFromUC_I.read DataFromUC_I.address DataFromUC_I.Data pi_to_uc.rx_data '0');
pi_to_uc.endpoint pi_to_uc.data_ready DatatoUC_Buffer_Rdy ReadCmdData CommandCode(10 downto 0) := "00000000000";
N_Data_EP '0');
CmdDecode CmdAccept_I CmdDataValid_I reg_ram_read CmdCodeValid_Out_Q if_busy_Q read_req_Q read_req_2Q ReadNData OutEndpoint := 0;
CommandFromSystem := (others => '0');
Count := 0;
Rx_N_Data_i CmdCodeValid_Out_2Q CommandData '0');
End_Transfer
elsif (FsClk'event AND FsClk = '1') then
-- Transferring Data to the system . The core(uc_handler block) assert
-- 'sie_write' signal when it has to transfer data. The setup command
-- is passed to the the system through interrupt and Data through Ram.
-- There is one clock cycle introduced in the pi_handler.
-- Reset for Read_I signal.
if(Read_I = '1') then
Read_I end if;
-- reset for trans_enable_I ;
if(trans_enable_I = '1') then
trans_enable_I end if;
if(CmdAccept_I) then
CmdAccept_I end if;
-- Reset for EndTransfer_Cmd_I
if(EndTransfer_Cmd_I = '1') then
EndTransfer_Cmd_I end if;
if(DataFromUC_I.read = true) then
DataFromUC_I.read end if;
if(DataFromUC_I.write = true) then
DataFromUC_I.write end if;
-- start receiving the Data from UC Handler
if(sie_write = '1') then
ValidData := true;
DataToSystem := uc_to_pi.rx_data;
OutEndPoint := uc_to_pi.endpoint;
end if;
-- receive command data from UC Handler
if(DataToUC_In.Ready) then
DataToUC_Buffer DataToUC_Buffer_Rdy end if;
-- send data to gif when GIF is not busy and data is valid
-- assert trans_enable_I high
if_busy_Q if(ValidData AND (NOT if_busy_Q)) then
data_out trans_enable_I -- see whether data corresponds to slave or dma endpoints
EP_number ValidData := false;
end if;
-- send command data to GIF
if(DataToUC_Buffer_Rdy and ReadCmdData) then
if(count_state = 0) then
EndTransfer_Cmd_I count_state elsif(count_state = 1) then
CommandData CmdDataValid_I count_state elsif(count_state = 2) then
EndTransfer_Cmd_I count_state DataToUC_Buffer_Rdy ReadCmdData CmdDataValid_I end if;
end if;
-- Seperate command channel to recieve the commands for uC
CmdCodeValid_Out_Q CmdCodeValid_Out_2Q if(not CmdCodeValid_Out_2Q and CmdCodeValid_Out_Q) then
CommandFromSystem := CommandCodeChannel;
CmdAccept_I CmdDecode end if;
if(CmdDecode) then
CommandCode(10 DOWNTO 8) := CommandFromSystem(2 DOWNTO 0);
if(CommandCode(10 downto 8) = "010") then
ReadCmdData else
ReadCmdData end if;
CommandCode(7 DOWNTO 0) := CommandFromSystem(10 downto 3);
send_command_code(CommandCode,DataFromUC_I);
CmdDecode end if;
-- Handling of IN transfer
if(start_in_transfer = '1') then
EndpointNr ReadNData reg_ram_read else
reg_ram_read end if;
-- Delay Read (which is a pulse) one clock before sending it to GIF
-- This is done to be sure that the GIF reads the correct EndpointNr
Read_i -- Synchronise read_req (twice to make sure data_in and N_Data are
-- stable when Read_Req_2Q becomes true)
read_req_Q read_req_2Q
-- Wait 4 cycles for data to become stable
if(Read_i = '1') then
count := 4;
end if;
if(count /= 0) then
count := count -1;
end if;
if(count = 1) then
Read_4T end if;
-- Send data to uc_handler
if(Read_4T = '1' and read_req_2Q = '1') then
pi_to_uc.rx_data pi_to_uc.endpoint pi_to_uc. data_ready Read_4T else
pi_to_uc. data_ready end if;
if(ReadNdata and read_req_2Q = '1') then
N_Data_EP ReadNData end if;
if(SIE_EndTransfer = '1') then
N_Data_EP '0');
end if;
if(SIE_EndTransfer = '1') then
End_Transfer if((RxError_SIE = false) or (dma_endp_iso(uc_to_pi.endpoint))) then
Rx_N_data_i else
Rx_N_data_i end if;
else
Rx_N_data_i End_Transfer end if;
end if;
end PROCESS;
end rtl;
