USBRTL电路的VHDL和Verilog代码

源代码在线查看: usb_new_glue_ent.vhdl

软件大小: 263 K
上传用户: a415834839
关键词: Verilog USBRTL VHDL 电路
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相关代码

				--------------------------------------------------------------------------------
				--
				--  P H I L I P S  C O M P A N Y  R E S T R I C T E D
				--                                         
				--  Copyright (c) 1998.                    
				--
				--  Philips Electronics N.V.
				--
				--  Philips Semiconductors
				--  Interconnectivity and Processor Peripheral group
				--  Bangalore,India
				--  All rights reserved. Reproduction in whole or in part is prohibited
				--  without the written permission of the copyright owner.
				--
				--------------------------------------------------------------------------------
				--
				--  File            : usb_new_glue_ent.vhdl 
				--
				--  Module          : GLUE 
				--
				--  Project         : VPB bus Interface to USB 1.1 Device(USBFS22)
				--
				--  Author          :              
				--
				--  Description     :The entity of GLUE module.
				--
				--  Status          : 
				--
				--  Contact address : 
				--
				--------------------------------------------------------------------------------
				
				library ieee;
				use IEEE.std_logic_1164.all;
				use IEEE.numeric_std.all;
				
				library work;
				use work.PCK_GENERAL.all;
				use work.PCK_USB.all;
				use work.PCK_CONFIGURATION.all;
				use work.PCK_SETUP.all;
				
				library work;
				use work.PCK_APB.all;
				
				entity GLUE is
				    port(
				         -- APB interface signals
				         r_data:	      out std_logic_vector(31 downto 0) ;
				         USB_r_data:	       in four_bytes;
				         gnt:		      out std_logic;
				         USB_gnt:	       in one_bit;
				         clk:		       in std_logic;
				         USB_clk:	      out one_bit;
				         pvci_reset_n:         in std_logic;
				         USB_reset_n:	      out one_bit;
					 USB_AsynReset_N:      in std_logic;
				         pvci_reset_n_out:    out one_bit;
				         req:		       in std_logic;  
				         USB_req:	      out one_bit;  
				         address:	       in std_logic_vector(7 downto 0) ;
				         USB_address:	      out byte;
				         rnw:		       in std_logic;  
				         USB_rnw:	      out one_bit;  
				         w_data:	       in std_logic_vector(31 downto 0); 
				         USB_w_data:	      out four_bytes; 
				         
				         -- interupt Requests
				         Intr_Request_Irq:     in one_bit;
				         USB_Int_Req_Irq:     out std_logic;
				         Intr_Request_Fiq:     in one_bit;
				         USB_Int_Req_Fiq:     out std_logic;
				         
				         -- Clocks
				         Clk12MHzRef:	      out one_bit;
				         Clk12MHzRef_O:        in one_bit;
				         Clk12MHz_O:	       in one_bit;
				         Clk48MHz:	      out one_bit;
				         USB_NeedClk:	      out std_logic;
				       
				         DH_Connect:	       in boolean;
				         FsClk: 	      out one_bit;
				         HB_UsbLineBits:      out two_bits;
				         HB_UsbDifBit:        out one_bit;
				         HC_ResetDevice:      out booleans(N_EMBEDDED_PORTS -1 downto 0);
				         USB_BitClk:	       in std_logic;
				         USB_BitClk_Out:      out std_logic;
				         USB_MainClk:	       in std_logic;
				       
				         ---------- Connect ---------
				         USB_Connect_N:       out std_logic;
				         USB_VBus:	       in std_logic;
				       
				         ---------- Misc ---------
				         ChipID:	      out S_ChipID;
				         PINConfigArray:      out S_PINConfigArray;
				   
				         Suspend_In:	      out boolean;
				         TestMode:	      out one_bit;		    
				         USB_Reset_O_N:        in one_bit;	       
				         USB_Suspended:        in one_bit;
				         USB_TestMode:         in std_logic;		 
				         VBusAvailable:       out boolean;	     
				       
				         ---------- Open ---------
				         CR_DebugRecDataN:     in one_bit;	   
				         CR_DebugRecDataP:     in one_bit;	    
				         Reset12MHzRef_N:      in one_bit;    
				         SIE_RxUsbLogValue:    in T_UsbLog_enum;    
				         TM_ClockRestarted:    in boolean;	   
				         TM_Idle5ms:	       in boolean;
				
				         --  Used --
				         TM_ClockOn:	       IN one_bit;
				        
				         ---------- Raminterface ---------
				         RxRAM_E_N:	       in one_bit;
				         RxRAM_W_N:	       in one_bit;
				         RxRAM_G_N:	       in one_bit;
				         RxRAM_A:	       in RxRAMAddr_bits;
				         RxRAM_DQ_In:	      out four_bytes;
				         RxRAM_DQ_Out:         in four_bytes;
				
				         TxRAM_E_N:	       in one_bit;
				         TxRAM_W_N:	       in one_bit;
				         TxRAM_G_N:	       in one_bit;
				         TxRAM_A:	       in TxRAMAddr_bits;
				         TxRAM_DQ_In:	      out four_bytes;
				         TxRAM_DQ_Out:         in four_bytes;
				
				         USB_RxRAM_E_N:       out std_logic;
				         USB_RxRAM_W_N:       out std_logic;
				         USB_RxRAM_G_N:       out std_logic;
				         USB_RxRAM_A:	      out std_logic_vector(RxRAMAddr_Width-1 downto 0);
				         USB_RxRAM_DQ_In:      in std_logic_vector(31 downto 0);
				         USB_RxRAM_DQ_Out:    out std_logic_vector(31 downto 0);
				 
				         USB_TxRAM_E_N:       out std_logic;
				         USB_TxRAM_W_N:       out std_logic;
				         USB_TxRAM_G_N:       out std_logic;
				         USB_TxRAM_A:	      out std_logic_vector(TxRAMAddr_Width-1 downto 0);
				         USB_TxRAM_DQ_In:      in std_logic_vector(31 downto 0);
				         USB_TxRAM_DQ_Out:    out std_logic_vector(31 downto 0);
				
				         ---------- Suspend ---------
				         USB_Suspend:	      out std_logic;	   
				        
				         ---------- General ---------
				         SIE_UsbEnable_N:      in one_bit;	     
				         TM_EOF2:	       in boolean;		    
				         RemoteWakeup:        out boolean;
				         SIE_LowSpeedTransaction: in boolean;	
				         RG_BUSReset:	       in boolean;		 
				         TM_IsoToggle:         in integer range 0 to 1;    
				        
				         ---------- Upstream port ---------
				         Configured_LED:       in one_bit;	     
				         UP_DM: 	       in one_bit;		       
				         UP_DP: 	       in one_bit;    
				         UP_DsLineBits:       out two_bits;	       
				         USB_FrameClock:       in one_bit;    
				         USB_UP_LED_N:        out std_logic;
				         USB_UP_RxDM:	       in std_logic;
				         USB_UP_RxDP:	       in std_logic;
				         USB_UP_RxRCV:         in std_logic;
				         USB_UP_TxDM:	      out std_logic;
				         USB_UP_TxDP:	      out std_logic;		 
				         USB_UP_TxEnable_N:   out std_logic
				        );
				end GLUE;
				
							

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