a verilog prigram for SPI

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• a verilog prigram for SPI免费下载

  资源简介：a verilog prigram for SPI

  标签： verilog prigram for SPI

  上传时间： 2016-07-22

  上传用户：天诚24

• This is a verilog code used oversampled clock to implement SPI slave. Also include C code for a ARM免费下载

  资源简介：This is a verilog code used oversampled clock to implement SPI slave. Also include C code for a ARM processor as the SPI master

  标签： code oversampled implement include

  上传时间： 2013-12-13

  上传用户：leixinzhuo

• crack for ModelSim, a Verilog, VHDL and mixed VHDL / Verilog CAD simulator for FPGA, board and IC de免费下载

  资源简介：crack for ModelSim, a Verilog, VHDL and mixed VHDL / Verilog CAD simulator for FPGA, board and IC design.

  标签： Verilog VHDL and for

  上传时间： 2015-07-10

  上传用户：15736969615

• A loopback sample for using SPI in dspic免费下载

  资源简介：A loopback sample for using SPI in dspic

  标签： loopback sample dspic using

  上传时间： 2016-02-03

  上传用户：rocketrevenge

• it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in x免费下载

  资源简介：it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.

  标签： synthesize simulator modelsim interin

  上传时间： 2017-03-22

  上传用户：洛木卓

• it is a verilog code written for digital watch in modelsim simulator and it will synthesize in xin免费下载

  资源简介：it is a verilog code written for digital watch in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]

  标签： synthesize simulator modelsim digital

  上传时间： 2014-01-10

  上传用户：kernaling

• it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8免费下载

  资源简介：it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is requir...

  标签： synthesize simulator modelsim verilog

  上传时间： 2014-06-26

  上传用户：zhuyibin

• it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have免费下载

  资源简介：it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].it is a state machine based code.

  标签： controller synthesize verilog traffic

  上传时间： 2017-03-22

  上传用户：xymbian

• it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix免费下载

  资源简介：it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]

  标签： synthesize verilog machine written

  上传时间： 2013-12-11

  上传用户：yepeng139

• Verilog for SPI Core source code免费下载

  资源简介：Verilog for SPI Core source code

  标签： Verilog source Core code

  上传时间： 2014-01-01

  上传用户：Shaikh