This m file analyzes a coherent binary phase shift keyed(BPSK) and a amplitude shift keyed(ASK) communication system. The receiver uses a correlator(mixer-integrator[LPF]) configuration with BER measurements comparing measured and theoretical results. The bandpass and low pass used in the receiver a ...
VHDL实现SPI功能源代码
-- The SPI bus is a 3 wire bus that in effect links a serial shift
-- register between the "master" and the "slave". Typically both the
-- master and slave have an 8 bit shift register so the combined
-- register is 16 bits. When an SPI transfer takes place, the master and
-- s ...
