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VIRTEX 160

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  • Virtex-7HT_Press_Pitch-Chinese-final

    赛灵思正式发货全球首款异构 3D FPGA,为 Nx100G 和 400G 线路卡解决方案带来突破性集成能力

    /dl/32495.html

    标签: HT_Press_Pitch-Chinese-final Virtex

    上传时间: 2013-10-11

    上传用户:13033095779

  • 赛灵思Artix-7 FPGA 数据手册:直流及开关特性

      本文是关于赛灵思Artix-7 FPGA 数据手册:直流及开关特性的详细介绍。   文章中也讨论了以下问题:   1.全新 Artix-7 FPGA 系列有哪些主要功能和特性?   Artix-7 系列提供了业界最低功耗、最低成本的 FPGA,采用了小型封装,配合Virtex 架构增强技术,能满足小型化产品的批量市场需求,这也正是此前 Spart ...

    /dl/32512.html

    标签: Artix FPGA 赛灵思 数据手册

    上传时间: 2013-10-11

    上传用户:zouxinwang

  • XAPP694-从配置PROM读取用户数据

    This application note describes how to retrieve user-defined data from Xilinx configurationPROMs (XC18V00 and Platform Flash devices) after the same PROM has configured theFPGA. The method to add user-defined data to the configuration PROM file is also discussed.The reference design described in t ...

    /dl/32574.html

    标签: XAPP PROM 694 读取

    上传时间: 2013-11-11

    上传用户:zhouli

  • Virtex-6 FPGA PCB设计手册

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in ...

    /dl/32592.html

    标签: Virtex FPGA PCB 设计手册

    上传时间: 2014-01-13

    上传用户:竺羽翎2222

  • WP247 - Virtex-5系列高级封装

    The exacting technological demands created byincreasing bandwidth requirements have given riseto significant advances in FPGA technology thatenable engineers to successfully incorporate highspeedI/O interfaces in their designs. One aspect ofdesign that plays an increasingly important role isthat o ...

    /dl/32593.html

    标签: Virtex 247 WP 高级封装

    上传时间: 2013-10-22

    上传用户:1234xhb

  • XAPP719 -利用USR_ACCESS寄存器实现PowerPC高速缓存配置

    The Virtex™-4 user access register (USR_ACCESS_VIRTEX4) is a 32-bit register thatprovides direct access to bitstream data by the FPGA fabric. It is useful for loadingPowerPC™ 405 (PPC405) processor caches and/or other data into the FPGA after the FPGAhas been configured, thus achieving ...

    /dl/32602.html

    标签: USR_ACCESS PowerPC XAPP 719

    上传时间: 2013-11-13

    上传用户:我累个乖乖

  • 基于Xilinx FPGA的双输出DC/DC转换器解决方案

      Xilinx FPGAs require at least two power supplies: VCCINTfor core circuitry and VCCO for I/O interface. For the latestXilinx FPGAs, including Virtex-II Pro, Virtex-II and Spartan-3, a third auxiliary supply, VCCAUX may be needed. Inmost cases, VCCAUX can share a power supply with VCCO.The ...

    /dl/32612.html

    标签: Xilinx FPGA DC 输出

    上传时间: 2013-10-22

    上传用户:liu999666

  • XAPP740利用AXI互联设计高性能视频系统

    This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX  and area optimizat ...

    /dl/32619.html

    标签: XAPP 740 AXI 互联

    上传时间: 2013-11-14

    上传用户:fdmpy

  • WP370 -采用智能时钟门控技术降低动态开关功耗

        赛灵思推出业界首款自动化精细粒度时钟门控解决方案,该解决方案可将 Virtex®-6 和 Spartan®-6 FPGA 设计方案的动态功耗降低高达 30%。赛灵思智能时钟门控优化可自动应用于整个设计,既无需在设计流程中添加更多新的工具或步骤,又不会改变现有逻辑或时钟,从而避免设计修改。此外,在大多数情况下 ...

    /dl/32629.html

    标签: 370 WP 智能时钟 动态

    上传时间: 2013-11-16

    上传用户:eastimage

  • 扩频通信芯片STEL-2000A的FPGA实现

    针对传统集成电路(ASIC)功能固定、升级困难等缺点,利用FPGA实现了扩频通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核实现NCO模块,在下变频模块调用了硬核乘法器并引入CIC滤波器进行低通滤波,给出了DQPSK解调的原理和实现方法,推导出一种简便的引入?仔/4固定相移的实现方法。采用模块化的设计方法使用VHDL语言 ...

    /dl/32653.html

    标签: STEL 2000 FPGA 扩频通信

    上传时间: 2013-11-06

    上传用户:liu123