是一些很好的FPGA设计实例

				Analysis & Synthesis Status : Successful - Sun Feb 25 04:49:43 2007
				Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
				Revision Name : control
				Top-level Entity Name : control
				Family : ACEX1K
				Total logic elements : 135
				Total pins : 29
				Total memory bits : 0
				Total PLLs : 0