一些很好的FPGA设计实例

				Analysis & Synthesis Status : Successful - Wed Oct 10 21:54:37 2007
				Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
				Revision Name : control
				Top-level Entity Name : control
				Family : Stratix
				Total logic elements : 13
				Total pins : 27
				Total virtual pins : 0
				Total memory bits : 0
				DSP block 9-bit elements : 0
				Total PLLs : 0
				Total DLLs : 0