《Protel DXP 2004 SP2原理图与PCB设计（第2版）》范例源文件

				Push-Pull Amplifier
				*SPICE Netlist generated by Advanced Sim server on 11/06/2002 4:15:41 PM
				
				*Schematic Netlist:
				C1 IN A 1.26uF
				Q1 VCC B1 OUT 2N2219A
				Q2 VSS B2 OUT 2N2905A
				R1 VCC B1 16k
				R2 B1 A 1k
				R3 A B2 1k
				R4 B2 VSS 16k
				RL OUT 0 50
				V1 IN 0 DC 0 SIN(0 1 10k 0 0 0) AC 1 0
				VCC VCC 0 +12V
				VSS VSS 0 -12V
				
				.SAVE 0 A B1 B2 IN OUT VCC VSS V1#branch VCC#branch VSS#branch @V1[z] @VCC[z]
				.SAVE @VSS[z]
				
				*PLOT TRAN -1 1 A=IN A=OUT
				
				*Selected Circuit Analyses:
				.TRAN 2E-6 0.0005 0 2E-6
				
				*Models and Subcircuit:
				.MODEL 2N2219A NPN(IKR=0.285 RB=1.53 RE=0.383 RC=0.153 CJE=2.41E-11 VJE=1.1
				+ MJE=0.5 TF=4.54E-10 CJC=2.02E-11 VJC=0.3 MJC=0.3 TR=3.15E-7 XTB=1.5 )
				
				.MODEL 2N2905A PNP(IS=6.09E-14 BF=130 VAF=139 IKF=0.36 ISE=4.68E-11 NE=2 BR=4
				+ VAR=20 IKR=0.54 RB=0.343 RE=0.0858 RC=0.0343 CJE=2.76E-11 VJE=1.1 MJE=0.5
				+ TF=5.3E-10 CJC=1.65E-11 VJC=0.3 MJC=0.3 TR=9.35E-8 XTB=1.5 )
				
				.END