来自FPGA开发板的PS2开发源代码

				Release 7.1i - Bitgen H.38				Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.				Loading device for application Rf_Device from file '3s400.nph' in environment
				C:/Xilinx.				   "top" is an NCD, version 3.1, device xc3s400, package pq208, speed -4				Opened constraints file top.pcf.								Thu May 29 23:59:05 2008								C:/Xilinx/bin/nt/bitgen.exe -intstyle ise -w -g DebugBitstream:No -g Binary:no -g CRC:Enable -g ConfigRate:6 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:PullUp -g ProgPin:PullUp -g DonePin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullUp -g TmsPin:PullUp -g UnusedPin:PullDown -g UserID:0xFFFFFFFF -g DCIUpdateMode:AsRequired -g StartUpClk:CClk -g DONE_cycle:4 -g GTS_cycle:5 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Security:None -g DonePipe:No -g DriveDone:No top.ncd 				
				Summary of Bitgen Options:
				+----------------------+----------------------+
				| Option Name          | Current Setting      |
				+----------------------+----------------------+
				| Compress             | (Not Specified)*     |
				+----------------------+----------------------+
				| Readback             | (Not Specified)*     |
				+----------------------+----------------------+
				| CRC                  | Enable**             |
				+----------------------+----------------------+
				| DebugBitstream       | No**                 |
				+----------------------+----------------------+
				| ConfigRate           | 6**                  |
				+----------------------+----------------------+
				| StartupClk           | Cclk**               |
				+----------------------+----------------------+
				| DCMShutdown          | Disable*             |
				+----------------------+----------------------+
				| DCIUpdateMode        | AsRequired**         |
				+----------------------+----------------------+
				| CclkPin              | Pullup**             |
				+----------------------+----------------------+
				| DonePin              | Pullup**             |
				+----------------------+----------------------+
				| HswapenPin           | Pullup*              |
				+----------------------+----------------------+
				| M0Pin                | Pullup**             |
				+----------------------+----------------------+
				| M1Pin                | Pullup**             |
				+----------------------+----------------------+
				| M2Pin                | Pullup**             |
				+----------------------+----------------------+
				| ProgPin              | Pullup**             |
				+----------------------+----------------------+
				| TckPin               | Pullup**             |
				+----------------------+----------------------+
				| TdiPin               | Pullup**             |
				+----------------------+----------------------+
				| TdoPin               | Pullup**             |
				+----------------------+----------------------+
				| TmsPin               | Pullup**             |
				+----------------------+----------------------+
				| UnusedPin            | Pulldown**           |
				+----------------------+----------------------+
				| GWE_cycle            | 6**                  |
				+----------------------+----------------------+
				| GTS_cycle            | 5**                  |
				+----------------------+----------------------+
				| LCK_cycle            | NoWait**             |
				+----------------------+----------------------+
				| Match_cycle          | Auto*                |
				+----------------------+----------------------+
				| DONE_cycle           | 4**                  |
				+----------------------+----------------------+
				| Persist              | No*                  |
				+----------------------+----------------------+
				| DriveDone            | No**                 |
				+----------------------+----------------------+
				| DonePipe             | No**                 |
				+----------------------+----------------------+
				| Security             | None**               |
				+----------------------+----------------------+
				| UserID               | 0xFFFFFFFF**         |
				+----------------------+----------------------+
				| ActivateGclk         | No*                  |
				+----------------------+----------------------+
				| ActiveReconfig       | No*                  |
				+----------------------+----------------------+
				| PartialMask0         | (Not Specified)*     |
				+----------------------+----------------------+
				| PartialMask1         | (Not Specified)*     |
				+----------------------+----------------------+
				| PartialMask2         | (Not Specified)*     |
				+----------------------+----------------------+
				| PartialGclk          | (Not Specified)*     |
				+----------------------+----------------------+
				| PartialLeft          | (Not Specified)*     |
				+----------------------+----------------------+
				| PartialRight         | (Not Specified)*     |
				+----------------------+----------------------+
				| IEEE1532             | No*                  |
				+----------------------+----------------------+
				| Binary               | No**                 |
				+----------------------+----------------------+
				 *  Default setting.
				 ** The specified setting matches the default setting.
				
				Running DRC.				WARNING:PhysDesignRules:372 - Gated clock. Clock net XLXI_3/tc_clkcnt is sourced
				   by a combinatorial pin. This is not good design practice. Use the CE pin to
				   control the loading of data into the flip-flop.				DRC detected 0 errors and 1 warnings.				Creating bit map...				Saving bit stream in "top.bit".				Bitstream generation is complete.