32位单精度浮点加法器

源代码在线查看: float_add_modue.fdo

软件大小: 4500 K
上传用户: yubo0808140725
关键词: 精度 浮点 加法器
下载地址: 免注册下载 普通下载 VIP

相关代码

				######################################################################
				##
				## Filename: float_add_modue.fdo
				## Created on: Mon Dec 24 0:05:46 中国标准时间 2012
				##
				##  Auto generated by Project Navigator for Behavioral Simulation
				##
				##  ---------------------DO NOT EDIT THIS FILE-------------------------
				##  You may want to add additional commands to control the simulation
				##  in the user specific do file (.udo) which is automatically
				##  generated in the project directory and will not be removed on
				##  subsequent simulation flows run from Project Navigator.
				##  ---------------------DO NOT EDIT THIS FILE-------------------------
				##
				######################################################################
				#
				# Create work library
				#
				vlib work
				#
				# Compile sources
				#
				vlog  "test_test.v"
				vlog  "E:/xi14.2/14.2/ISE_DS/ISE//verilog/src/glbl.v"
				#
				# Call vsim to invoke simulator
				#
				vsim -voptargs="+acc" -t 1ps  -L xilinxcorelib_ver -L unisims_ver -L unimacro_ver -L secureip -lib work work.float_add_modue glbl
				#
				# Source the wave do file
				#
				do {float_add_modue_wave.fdo}
				#
				# Set the window types
				#
				view wave
				view source
				view list
				add list *
				view structure
				view signals
				#
				# Source the user do file
				#
				do {float_add_modue.udo}
				#
				# Run simulation for this time
				#
				run 10ns
				#
				# End
				#
							

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