ATA接口的IP核,经过量产的验证,已经在quartus5.1下编译通过了.

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				Revision: 1.0
				Date: februar 18th, 2002
				Author: Richard Herveille
				- initial Verilog release
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				Revision: 1.1
				Date: May 19th, 2002.
				Author: Richard Herveille
				- Fixed a potential bug that forced the core into an unknown state
				  when an asynchronous reset was given without a running clock
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