设计与验证verilog hdl
源代码在线查看: mod_copy1.edn
(edif mod_copy1
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap (keywordLevel 0))
(status
(written
(timeStamp 2006 3 8 17 59 18)
(author "Synplicity, Inc.")
(program "Synplify Pro" (version "8.1.0, Build 532R"))
)
)
(library LUCENT
(edifLevel 0)
(technology (numberDefinition ))
(cell OB (cellType GENERIC)
(view PRIM (viewType NETLIST)
(interface
(port I (direction INPUT))
(port O (direction OUTPUT))
)
)
)
(cell IB (cellType GENERIC)
(view PRIM (viewType NETLIST)
(interface
(port I (direction INPUT))
(port O (direction OUTPUT))
)
)
)
(cell ORCALUT4 (cellType GENERIC)
(view PRIM (viewType NETLIST)
(interface
(port A (direction INPUT))
(port B (direction INPUT))
(port C (direction INPUT))
(port D (direction INPUT))
(port Z (direction OUTPUT))
)
)
)
(cell VLO (cellType GENERIC)
(view PRIM (viewType NETLIST)
(interface
(port Z (direction OUTPUT))
)
)
)
)
(library work
(edifLevel 0)
(technology (numberDefinition ))
(cell mod_copy1 (cellType GENERIC)
(view verilog (viewType NETLIST)
(interface
(port sel (direction INPUT)
)
(port a (direction INPUT)
)
(port b (direction INPUT)
)
(port c (direction INPUT)
)
(port d (direction INPUT)
)
(port data_out (direction OUTPUT))
)
(contents
(instance GND_0 (viewRef PRIM (cellRef VLO (libraryRef LUCENT))) )
(instance data_out_pad (viewRef PRIM (cellRef OB (libraryRef LUCENT))) )
(instance d_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT))) )
(instance c_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT))) )
(instance b_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT))) )
(instance a_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT))) )
(instance sel_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT))) )
(instance data_outZ0 (viewRef PRIM (cellRef ORCALUT4 (libraryRef LUCENT)))
(property lut_function (string "(!D A+D (!C B+C !B))"))
)
(instance G_2 (viewRef PRIM (cellRef ORCALUT4 (libraryRef LUCENT)))
(property lut_function (string "(!B A+B !A)"))
)
(net GND (joined
(portRef Z (instanceRef GND_0))
))
(net GZ0Z_2 (joined
(portRef Z (instanceRef G_2))
(portRef A (instanceRef data_outZ0))
))
(net sel_c (joined
(portRef O (instanceRef sel_pad))
(portRef D (instanceRef data_outZ0))
))
(net sel (joined
(portRef sel)
(portRef I (instanceRef sel_pad))
))
(net a_c (joined
(portRef O (instanceRef a_pad))
(portRef B (instanceRef data_outZ0))
))
(net a (joined
(portRef a)
(portRef I (instanceRef a_pad))
))
(net b_c (joined
(portRef O (instanceRef b_pad))
(portRef C (instanceRef data_outZ0))
))
(net b (joined
(portRef b)
(portRef I (instanceRef b_pad))
))
(net c_c (joined
(portRef O (instanceRef c_pad))
(portRef A (instanceRef G_2))
))
(net c (joined
(portRef c)
(portRef I (instanceRef c_pad))
))
(net d_c (joined
(portRef O (instanceRef d_pad))
(portRef B (instanceRef G_2))
))
(net d (joined
(portRef d)
(portRef I (instanceRef d_pad))
))
(net data_out_c (joined
(portRef Z (instanceRef data_outZ0))
(portRef I (instanceRef data_out_pad))
))
(net data_out (joined
(portRef O (instanceRef data_out_pad))
(portRef data_out)
))
)
)
)
)
(design mod_copy1 (cellRef mod_copy1 (libraryRef work)))
)