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Timing Analyzer Summary
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Type : Worst-case tsu
Slack : N/A
Required Time : None
Actual Time : 7.582 ns
From : reset
To : mc8051_ram:inst2|altsyncram:altsyncram_component|altsyncram_31b1:auto_generated|ram_block1a4~porta_datain_reg7
From Clock : --
To Clock : clk
Failed Paths : 0
Type : Worst-case tco
Slack : N/A
Required Time : None
Actual Time : 11.459 ns
From : mc8051_core:inst|mc8051_control:i_mc8051_control|control_mem:i_control_mem|p0[6]
To : led[6]
From Clock : clk
To Clock : --
Failed Paths : 0
Type : Worst-case th
Slack : N/A
Required Time : None
Actual Time : -7.434 ns
From : reset
To : mc8051_ram:inst2|altsyncram:altsyncram_component|altsyncram_31b1:auto_generated|ram_block1a4~porta_datain_reg7
From Clock : --
To Clock : clk
Failed Paths : 0
Type : Clock Setup: 'clk'
Slack : N/A
Required Time : None
Actual Time : 15.54 MHz ( period = 64.358 ns )
From : mc8051_rom:inst1|altsyncram:altsyncram_component|altsyncram_ir21:auto_generated|q_a[4]
To : mc8051_core:inst|mc8051_control:i_mc8051_control|control_mem:i_control_mem|gprbit[14][2]
From Clock : clk
To Clock : clk
Failed Paths : 0
Type : Total number of failed paths
Slack :
Required Time :
Actual Time :
From :
To :
From Clock :
To Clock :
Failed Paths : 0
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