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  • TJA1042 High-speed CAN transce

    The TJA1042 is a high-speed CAN transceiver that provides an interface between aController Area Network (CAN) protocol controller and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing the differential trans ...

    /dl/31037.html

    标签: High-speed transce 1042 TJA

    上传时间: 2014-12-28

    上传用户:气温达上千万的

  • TJA1051 High-speed CAN transce

    The TJA1051 is a high-speed CAN transceiver that provides an interface between aController Area Network (CAN) protocol controller and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing differential transmit ...

    /dl/31043.html

    标签: High-speed transce 1051 TJA

    上传时间: 2013-10-17

    上传用户:jisujeke

  • 3-V TO 5.5-V MULTICHANNEL RS-2

    The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-23 ...

    /dl/31075.html

    标签: MULTICHANNEL 5.5 TO RS

    上传时间: 2013-10-19

    上传用户:ddddddd

  • Virtex-6 FPGA PCB设计手册

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in ...

    /dl/32592.html

    标签: Virtex FPGA PCB 设计手册

    上传时间: 2014-01-13

    上传用户:竺羽翎2222

  • XAPP740利用AXI互联设计高性能视频系统

    This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX  and area optimizat ...

    /dl/32619.html

    标签: XAPP 740 AXI 互联

    上传时间: 2013-11-14

    上传用户:fdmpy

  • CPLD库指南

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the D ...

    /dl/32639.html

    标签: CPLD

    上传时间: 2013-10-22

    上传用户:李哈哈哈

  • UART 4 UART参考设计,Xilinx提供VHDL代码

    UART 4 UART参考设计,Xilinx提供VHDL代码 uart_vhdl This zip file contains the following folders:  \vhdl_source  -- Source VHDL files:      uart.vhd  - top level file      txmit.vhd - transmit portion of uart  &nb ...

    /dl/32719.html

    标签: UART Xilinx VHDL 参考设计

    上传时间: 2013-11-07

    上传用户:jasson5678

  • 基于ZigBee技术的无线智能家用燃气报警系统

    在研究传统家用燃气报警器的基础上,以ZigBee协议为平台,构建mesh网状网络实现网络化的智能语音报警系统。由于传感器本身的温度和实际环境温度的影响,传感器标定后采用软件补偿方法。为了减少系统费用,前端节点采用半功能节点设备,路由器和协调器采用全功能节点设备,构建mesh网络所形成的家庭内部报警系统,通过通用的 ...

    /dl/36484.html

    标签: ZigBee 无线智能 报警系统

    上传时间: 2013-10-30

    上传用户:swaylong

  • 基于(英蓓特)STM32V100的串口程序

    This example provides a description of how  to use the USART with hardware flowcontrol and communicate with the Hyperterminal.First, the USART2 sends the TxBuffer to the hyperterminal and still waiting fora string from the hyperterminal that you must enter which must end by '\r'character (keypa ...

    /dl/37358.html

    标签: V100 STM 100 32V

    上传时间: 2013-10-31

    上传用户:yy_cn

  • Virtex-6 FPGA PCB设计手册

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in ...

    /dl/40076.html

    标签: Virtex FPGA PCB 设计手册

    上传时间: 2013-11-11

    上传用户:zwei41