iic总线控制器VHDL实现
-- VHDL Source Files:
i2c.vhd -- top level file
i2c_control.vhd -- control function for the I2C master/slave
shift.vhd -- shift register
uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC
upcnt4.vhd -- 4-bit up counter
i2c_timesim.vhd -- po ...
C 开发的有限元软件，界面还可以，不错，可以试试。 FElt is a free system for introductory level finite element analysis. It is
primarily intended as a teaching tool for introductory type courses in finite
elements - probably in the mechanical/structural/civil fields. In a command
line environment, ...
