基于MC145159的PLL频率合成器设计与实现
介绍了锁相环路频率合成器的基本原理,分析了集成锁相环芯片M C 145159的工作特性,给出了集成锁相环芯片M C 145159的一个应用实例,为高频频率合成器的设计提供了一个较好的思路.测试结果证明了设计的合理性与实用性,系统频率稳定度优于10-7. ...
Jitter is extremely important in systems using PLL-based
clock drivers. The effects of jitter range from not having any
effect on system operation to rendering the system completely
non-functional. This application note provides the reader
with a clear understanding of jitter in high-speed systems. ...
Cypress Semiconductor makes a variety of PLL-based clock
generators. This application note provides a set of recommendations
to optimize usage of Cypress clock devices in a
system. The application note begins with recommended termination
techniques for clock generators. Subsequently, power
supply fi ...