This white paper discusses how market trends, the need for increased productivity, and new legislation have
accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is
changing the paradigms of safety designs and will greatly reduce development e ...
XAPP520将符合2.5V和3.3V I/O标准的7系列FPGA高性能I/O Bank进行连接
The I/Os in Xilinx® 7 series FPGAs are classified as either high range (HR) or high performance (HP) banks. HR I/O banks can be operated from 1.2V to 3.3V, whereas HP I/O banks are optimized for operation between 1.2V and ...
8051参考设计，与其他8051的免费IP相比，文档相对较全，Oregano System 提供
This is version 1.3 of the MC8051 IP core.
September 2002: Oregano Systems - Design & Consulting GesmbH
Change history:
- Improved tb_mc8051_siu_sim.vhd to verify duplex operation.
- Corrected problem with duplex operat ...
a8259 可编程中断控制 altera提供
The a8259 is designed to simplify the implementation of the interrupt interface in 8088 and 8086 based microcomputer systems. The device is known as a programmable interrupt controller. The a8259 receives and prioritizes up to 8 interrupts, ...
Full support for extended regular expressions (those with intersection and complement); Support for some kinds of cycles in grammar; DFA-based operation; Unicode support; C++ only, requires a modern compiler; Lexical analyzers can be configured to get symbols from any input class (built-in support f ...
AFD - Advanced Filter Design using MATLABMiroslav D. Lutovac, Dejan V. Tosicversion 1.00 released 15 October 1999This program is freeware.Unpack with path names, for exampleDOS: pkunzip -d afdunix: unzip -L afdAfter unpacking afd.zip, and run MATLAB,change directory to afdfrom the MATLAB command win ...
This an adaptive receiver for a direct-sequence spread spectrum (DS-SS) system over an AWGN channel. The adaptive receiver block is modified from the LMS adaptive filter block in DSP Blockset. For DS-SS signal reception, the adaptive filter needs to have multi-rate operation. The input sample rate i ...
This firmware translates a PS/2 mouse to a USB mouse. The translator
firmware is entirely interrupt driven (with the exception of sending the
data via USB to the host.) An interrupt is generated when the PS/2 start
bit is received, at which time the firmware will begin its receive routine.
In ad ...
This m file models a DPSK UWB system using a delay in one leg of the mixer, correlation receiver low pass filter combination requiring no template for synching. Various waveforms are displayed throughout the system to allow the user to observe operation of the system.
