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  • XAPP719 -利用USR_ACCESS寄存器实现PowerPC高速缓存配置

    The Virtex™-4 user access register (USR_ACCESS_VIRTEX4) is a 32-bit register thatprovides direct access to bitstream data by the FPGA fabric. It is useful for loadingPowerPC™ 405 (PPC405) processor caches and/or other data into the FPGA after the FPGAhas been configured, thus achieving ...

    /dl/40081.html

    标签: USR_ACCESS PowerPC XAPP 719

    上传时间: 2013-12-23

    上传用户:yuanwenjiao

  • XAPP328-使用CPLD设计MP3播放器

      MP3 portable players are the trend in music-listening technology. These players do not includeany mechanical movements, thereby making them ideal for listening to music during any type ofactivity. MP3 is a digital compression technique based on MPEG Layer 3 which stores music ina lot less ...

    /dl/40098.html

    标签: XAPP CPLD 328 MP3

    上传时间: 2013-11-23

    上传用户:nanxia

  • State Machine Coding Styles for Synthesis

      本文论述了状态机的verilog编码风格,以及不同编码风格的优缺点,Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concernin ...

    /dl/40134.html

    标签: Synthesis Machine Coding Styles

    上传时间: 2013-10-12

    上传用户:sardinescn

  • Creating Safe State Machines(Mentor)

      Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptabl ...

    /dl/40149.html

    标签: Creating Machines Mentor State

    上传时间: 2013-11-02

    上传用户:xauthu

  • 基于CPLD的QDPSK调制解调电路设计

    为了在CDMA系统中更好地应用QDPSK数字调制方式,在分析四相相对移相(QDPSK)信号调制解调原理的基础上,设计了一种QDPSK调制解调电路,它包括串并转换、差分编码、四相载波产生和选相、相干解调、差分译码和并串转换电路。在MAX+PLUSⅡ软件平台上,进行了编译和波形仿真。综合后下载到复杂可编程逻辑器件EPM7128SLC84-15中 ...

    /dl/40237.html

    标签: QDPSK CPLD 调制解调 电路设计

    上传时间: 2013-10-28

    上传用户:jyycc

  • ref sdr sdram vhdl代码

    ref-sdr-sdram-vhdl代码 SDR SDRAM Controller v1.1 readme.txt This readme file for the SDR SDRAM Controller includes information that was not incorporated into the SDR SDRAM Controller White Paper v1.1. The PLL is targeted at APEX(TM) devices. Please regenerate for your chosen architecture. ...

    /dl/40394.html

    标签: sdram vhdl ref sdr

    上传时间: 2013-10-23

    上传用户:半熟1994

  • 运算放大器稳定时间的测量

    The AN10 begins with a survey of methods for measuring op amp settling time. This commentary develops into circuits for measuring settling time to 0.0005%. Construction details and results are presented. Appended sections cover oscilloscope overload limitations and amplifier frequency compensation ...

    /dl/41893.html

    标签: 运算放大器 稳定时间 测量

    上传时间: 2013-11-14

    上传用户:JIMMYCB001

  • 低噪声电压基准的噪声测量

      Frequently, voltage reference stability and noise defi nemeasurement limits in instrumentation systems. In particular,reference noise often sets stable resolution limits.Reference voltages have decreased with the continuingdrop in system power supply voltages, making referencenoise increa ...

    /dl/41895.html

    标签: 低噪声 电压基准 噪声测量

    上传时间: 2013-10-30

    上传用户:wxhwjf

  • AN26与LTC1090的接口设计

    A collection of interface applications between various microprocessors/ controllers and the LTC1090 family of data acquisition systems. The note is divided into sections specific to each interface.

    /dl/42420.html

    标签: 1090 LTC AN 26

    上传时间: 2013-11-08

    上传用户:sssnaxie

  • Foundation入门—仿真

    Explain how to open the Waveform Viewer for Verification ? State how to insert nodes into the Waveform Viewer ? Tell how to assign Stimulus with the Stimulator Selector

    /dl/42518.html

    标签: Foundation 仿真

    上传时间: 2013-10-29

    上传用户:daguogai