CF VHDL
The CF+ design was designed using the timing diagrams of the Compact Flash specification rev. 1.4, Analog Devices ADSP-218xN DSP Microcomputer specification, and the Intel StrataFlash Memory 28F320J3 specification.
/dl/281220.html
标签：
specification
the
designed
diagrams
上传时间：
2013-12-27
上传用户：yyyyyyyyyy
