中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html
Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture
The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
Consumer display applications commonly use high-speed LVDS interfaces to transfer videodata. Spread-spectrum clocking can be used to address electromagnetic compatibility (EMC)issues within these consumer devices. This application note uses Spartan®-6 FPGAs togenerate spread-spectrum ...
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html
Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture
The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
Consumer display applications commonly use high-speed LVDS interfaces to transfer videodata. Spread-spectrum clocking can be used to address electromagnetic compatibility (EMC)issues within these consumer devices. This application note uses Spartan®-6 FPGAs togenerate spread-spectrum ...
The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Spec ...
Pipeline synchronization is a simple, low-cost, highbandwidth,highreliability solution to interfaces between synchronous and asynchronous systems, or between
synchronous systems operating from different clocks.
There are many different (and often confusing) terms associated
with clock-based devices. This application note attempts
to clarify these terms, and hence serves as a comprehensive
reference on clock terminology. This application note can be
divided into two sections. The first section describes and ...
The P89LPC938 is a single-chip microcontroller, available in low cost packages, based on
a high performance processor architecture that executes instructions in two to four clocks,
six times the rate of standard 80C51 devices. Many system-level functions have been
incorporated into the P89LPC938 in ...
This is brief doccumentation done on the clock syncronasation in distributed systems.ths includes algorithem for physical and logical clocks and mutual exclusion.
This paper will discuss the design of an asynchronous FIFO,Asynchronous FIFOs are widely used in the computer networking industry to receive data at
a particular frequency and transmit them at another frequency. An asynchronous FIFO has
two different clocks: one for read and one for write.
