This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the deve ...
本文简单讨论并总结了VHDL、Verilog，System verilog 这三中语言的各自特点和区别As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers ...
ZBT SRAM控制器参考设计,xilinx提供VHDL代码
Description:
Contains the following files
readme.txt appnote_zbtp.vhd appnote_zbtf.vhd appnote_zbt.ucf
Platform:
All
Installation/Use:
Use 'unzip' on the .zip file and 'gunzip' followed by & ...
USB接口控制器参考设计,xilinx提供VHDL代码 usb xilinx vhdl
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 2 of the License, or
; ...
ref-sdr-sdram-vhdl代码
SDR SDRAM Controller v1.1 readme.txt
This readme file for the SDR SDRAM Controller includes information that was not
incorporated into the SDR SDRAM Controller White Paper v1.1.
The PLL is targeted at APEX(TM) devices. Please regenerate for your chosen architecture.
...
UART 4 UART参考设计，Xilinx提供VHDL代码 uart_vhdl
This zip file contains the following folders:
\vhdl_source -- Source VHDL files:
uart.vhd - top level file
txmit.vhd - transmit portion of uart
&nb ...
