DDR SDRAM控制器的VHDL源代码，含详细设计文档。
The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect
choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock
Manager (DCM) provides the required Delay Locked Loop (DLL), Dig ...
*** *** *** *** *** *** *****
** Two wire/I2C Bus READ/WRITE Sample Routines of Microchip s
** 24Cxx / 85Cxx serial CMOS EEPROM interfacing to a
** PIC16C54 8-bit CMOS single chip microcomputer
** Revsied Version 2.0 (4/2/92).
**
** Part use = PIC16C54-XT/JW
** Note: 1) All timings are base ...
This book explains how to write device drivers for the newest members of the MicrosoftWindows family of operating systems using the Windows Driver Model (WDM). In this Introduction, I ll explain who should be reading this book, the organization of the book, and how to use the book most effectively. ...
The Synthetic PIC
Verion 1.1
This a VHDL synthesizable model of a simple PIC 16C5x microcontroller.
It is not, and is not intended as, a high fidelity circuit simulation.
This package includes the following files. Note that the license agreement
is stated in the main VHDL file, PICCPU.VHD and com ...
In this article, I will explain how to create UDP packets and then send them to a remote server through the Internet using WinPCap for Windows. The code has been tested to work with Windows XP SP2 and Vista SP1 on Linksys routers, and on Toshiba modems connected directly to the Internet. Please note ...
c pgm to find redundant paths in a graph.Many fault-tolerant network algorithms rely on an underlying assumption that there are possibly distinct network paths between a source-destination pair. Given a directed graph as input, write a program that uses depth-first search to determine all such paths ...
R1EX24xxx series are two-wire serial interface EEPROM (Electrically Erasable and Programmable
ROM). They realize high speed, low power consumption and a high level of reliability by employing
advanced MNOS memory technology and CMOS process and low voltage circuitry technology. They
also have a 128- ...
I ll probably write up a short article next week outlining how the ActionScript works, so people can modify it, and work with it more easily in Flex.
You can download the component and source code here. There are some instructions in the FLA on how to use it. Note that this is not a compiled compo ...
The use of hardware description languages (HDLs) is becoming
increasingly common for designing and verifying FPGA designs.
Behavior level description not only increases design productivity, but also
provides unique advantages for design verification. The most dominant
HDLs today are Verilog and VHDL ...
This file is distributed in the hope that it will be useful, but WITHOUT
* WARRANTY OF ANY KIND.
*
* Author(s): Ole Saether
*
* DESCRIPTION:
*
* Hello World program. Please note that this program runs the internal 8051
* on the default power up frequency of 4MHz. See ex3c.c for an exampl ...
