dsPIC30F产品手册
High Performance Digital Signal Controllers
This section of the manual contains the following topics:1.1 Introduction 1.2 Manual Objective 1.3 Device Structure1.4 Development Support 1.5 Style and Symbol Conventions 1.6 Related Documents 1.7 Revision History
FeaturesThe following standard features are provided.• Choice of RTOS scheduling policy1. Pre-emptive:Always runs the highest available task. Tasks of identical priorityshare CPU time (fully pre-emptive with round robin time slicing).2. Cooperative:Context switches only occur if a task blocks, ...
The Motorola MPC106 PCI bridge/memory controller provides a PowerPCªmicroprocessor common hardware reference platform (CHRPª) compliant bridgebetween the PowerPC microprocessor family and the Peripheral Component Interconnect(PCI) bus. In this document, the term Ô106Õ is used ...
The 87C576 includes two separate methods of programming theEPROM array, the traditional modified Quick-Pulse method, and anew On-Board Programming technique (OBP).Quick Pulse programming is a method using a number of devicepins in parallel (see Figure 1) and is the traditional way in which87C51 fami ...
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standa ...
ZBT SRAM控制器参考设计,xilinx提供VHDL代码
Description:
Contains the following files
readme.txt appnote_zbtp.vhd appnote_zbtf.vhd appnote_zbt.ucf
Platform:
All
Installation/Use:
Use 'unzip' on the .zip file and 'gunzip' followed by & ...
UART 4 UART参考设计，Xilinx提供VHDL代码 uart_vhdl
This zip file contains the following folders:
\vhdl_source -- Source VHDL files:
uart.vhd - top level file
txmit.vhd - transmit portion of uart
&nb ...
