This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the deve ...
Displays CPU time usage, the list of processes (can be terminated) and the task which are running (can be close or switch to). Plus a little net traffic monitor and a disk status report.
