Atmel’s AT91SAM7FP105 is a low pincount FingerChip processor based on the 32-bit ARM
RISC processor. It features a on-chip biometric engine performing enrollment verification and
identification, an internal record cache of up to 25 records and a secure command protocol over
USB, SPI, UART. This pro ...
Full compliance with the USB Specification v1.1 and USB CDC v1.1
Support the RS232 Serial interface
Support automatic handshake mode
Support Remote wake-up and power management
256 bytes buffer each for upstream and downstream data flow
Support default ROM or external EEPROM for device configur ...
ST7787 芯片的SPEC，比亚迪2.4inchLCM的SPEC。The ST7787 is a single-chip controller/driver for 262K-color, graphic type TFT-LCD. It consists of 720 source line and
320 gate line driving circuits. This chip is capable of connecting directly to an external microprocessor, and accepts Serial
Peripheral I ...
Name Function
--- --- --- --- --- ---
Check_SST_39VF160 Check manufacturer and device ID
CFI_Query CFI Query Entry/Exit command sequence
Erase_Entire_Chip Erase the contents of the entire chip
Erase_One_Sector Erase a sector of 2048 word
Erase_One_Block Erase a block of 32K word
Program_One_Word Al ...
OpenSource GPS is software for x86 PCs that allows you to acquire, track and demodulate signals from GPS satellites. OSGPS requires a Zarlink GP2021 12 channel GPS correlator chip
当前LCM的主流接口有并口和串口。并口引脚多，产生串扰，串口则没有诸如此类的缺点。SPI作为串口家族的一员，具有高速同步、芯片管脚少和信号稳定不产生串扰等优点，越来越受到开发人员的青睐。但是，具有SPI的LCM并不是毫无缺点的，市场上以COG(chip on glass)方式封装的LCM大都是基于单工方式传输的，这将给开发带来了非 ...
This program would work fine only with a specific flash tool through PC printer port under EPP mode.Program is capable of identifying flash chip manufacturer, device type, capacity,... It also allows user to dump flash data, edit/revise the content of flash chip on the Screen, and re-write them back ...
The TMS320C54x, TMS320LC54x, and TMS320VC54x fixed-point, digital signal processor (DSP) families
(hereafter referred to as the ’54x unless otherwise specified) are based on an advanced modified Harvard
architecture that has one program memory bus and three data memory buses. These processors also ...
