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  • Virtex-6 FPGA PCB设计手册

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in ...

    /dl/40076.html

    标签: Virtex FPGA PCB 设计手册

    上传时间: 2013-11-11

    上传用户:zwei41

  • WP264-在数字视频应用中使用CPLD

      The CoolRunner-II CPLD is a highly uniform family of fast, low-power devices. Theunderlying architecture is a traditional CPLD architecture, combining macrocells intofunction blocks interconnected with a global routing matrix, the Xilinx AdvancedInterconnect Matrix (AIM). The function blo ...

    /dl/40077.html

    标签: CPLD 264 WP 数字

    上传时间: 2013-11-03

    上传用户:1037540470

  • WP200-将Spartan-3 FPGA用作远程数码相机的低成本控制器

      The introduction of Spartan-3™ devices has createdmultiple changes in the evolution of embedded controldesigns and pushed processing capabilities to the “almostfreestage.” With these new FPGAs falling under $20, involume, with over 1 million system gates, and under $5for ...

    /dl/40080.html

    标签: Spartan FPGA 200 WP

    上传时间: 2013-10-21

    上传用户:ligi201200

  • XAPP328-使用CPLD设计MP3播放器

      MP3 portable players are the trend in music-listening technology. These players do not includeany mechanical movements, thereby making them ideal for listening to music during any type ofactivity. MP3 is a digital compression technique based on MPEG Layer 3 which stores music ina lot less ...

    /dl/40098.html

    标签: XAPP CPLD 328 MP3

    上传时间: 2013-11-23

    上传用户:nanxia

  • Verilog Coding Style for Efficient Digital Design

      In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All the ...

    /dl/40128.html

    标签: Efficient Verilog Digital Coding

    上传时间: 2013-11-23

    上传用户:我干你啊

  • CPLD库指南

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the D ...

    /dl/40193.html

    标签: CPLD

    上传时间: 2014-12-05

    上传用户:qazxsw

  • Cadence PCB 设计与制板

    §1、安装:    SPB15.2 CD1~3,安装1、2,第3为库,不安装    License安装:         设置环境变量lm_license_file   D:\Cadence\license.dat         修改license中SERVER yy ...

    /dl/40272.html

    标签: Cadence PCB

    上传时间: 2014-01-25

    上传用户:wangcehnglin

  • USB接口控制器参考设计,xilinx提供VHDL代码 us

    USB接口控制器参考设计,xilinx提供VHDL代码 usb xilinx vhdl ;  This program is free software; you can redistribute it and/or modify ;  it under the terms of the GNU General Public License as published by ;  the Free Software Foundation; either version 2 of the License, or ;  ...

    /dl/40393.html

    标签: xilinx VHDL USB us

    上传时间: 2013-10-29

    上传用户:zhouchang199

  • SM320 PCB LAYOUT GUIDELINES

    Silicon Motion, Inc. has made best efforts to ensure that the information contained in this document is accurate andreliable. However, the information is subject to change without notice. No responsibility is assumed by SiliconMotion, Inc. for the use of this information, nor for infringements of pa ...

    /dl/40414.html

    标签: GUIDELINES LAYOUT 320 PCB

    上传时间: 2013-10-10

    上传用户:manga135

  • 低噪声电压基准的噪声测量

      Frequently, voltage reference stability and noise defi nemeasurement limits in instrumentation systems. In particular,reference noise often sets stable resolution limits.Reference voltages have decreased with the continuingdrop in system power supply voltages, making referencenoise increa ...

    /dl/41895.html

    标签: 低噪声 电压基准 噪声测量

    上传时间: 2013-10-30

    上传用户:wxhwjf