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`timescale 1ns/10ps module myrom_tb; reg read_en_; reg [3:0]addr; wire [3:0]read_data; myrom c1(.read_data(read_data),.addr(addr),.read_en_(read_en_)); initial begin read_en_=1; #5 read_en_=0; #5 read_en_=1; end initial begin:ONCE reg [4:0]pa; for(pa=0;pa addr=pa; $display("%b",read_data); end end endmodule
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