LCD Interface_Xilinx.CPLD源码参考设计

				.i 1
				.o 9
				.s 10
				.p 28
				.reset Rst
				.resettype async
				.clock Clk
				.resetstate st0
				.type fdr
				.ilb In0
				.ob Out0 Out1 Out2 Out3 Out4 Out5 Out6 Out7 Out8
				.obdefault 000000000
				.ffname CurrentState
				.fftype d
				.usedc 0
				.code Auto
				0 st0 st0 000000000
				1 st0 st1 000000000
				0 st1 st1 000000000
				1 st1 st2 000000000
				0 st2 st2 000000000
				1 st2 st3 000000000
				0 st3 st3 000000000
				1 st3 st4 000000000
				0 st4 st4 000000000
				1 st4 st5 000000000
				0 st5 st5 000000000
				1 st5 st6 000000000
				0 st6 st6 000000000
				1 st6 st7 000000000
				0 st7 st7 000000000
				1 st7 st8 000000000
				0 st8 st8 000000000
				1 st8 st9 000000000
				- st9 st9 000000000
				- st1 void 100000000
				- st2 void 010000000
				- st3 void 001000000
				- st4 void 000100000
				- st5 void 000010000
				- st6 void 000001000
				- st7 void 000000100
				- st8 void 000000010
				- st9 void 000000001
				.e
				st0	0
				st1	1
				st2	2
				st3	3
				st4	4
				st5	5
				st6	6
				st7	7
				st8	8
				st9	9