Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档

源代码在线查看: uart.bgn

软件大小: 51961 K
上传用户: novelty1234
关键词: S-Core-V Mars-XC 2.0 50
下载地址: 免注册下载 普通下载 VIP

相关代码

				Release 7.1i - Bitgen H.38				Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.				Loading device for application Rf_Device from file 'v50.nph' in environment
				D:/Xilinx.				   "uart" is an NCD, version 3.1, device xc2s50, package tq144, speed -6				Opened constraints file uart.pcf.								Tue Mar 14 15:08:59 2006								D:/Xilinx/bin/nt/bitgen.exe -intstyle ise -w -g DebugBitstream:No -g Binary:no -g Gclkdel0:11111 -g Gclkdel1:11111 -g Gclkdel2:11111 -g Gclkdel3:11111 -g ConfigRate:4 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:PullUp -g ProgPin:PullUp -g DonePin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullUp -g TmsPin:PullUp -g UnusedPin:PullNone -g UserID:0xFFFFFFFF -g StartUpClk:CClk -g DONE_cycle:4 -g GTS_cycle:5 -g GSR_cycle:6 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Security:None -g DonePipe:No -g DriveDone:No uart.ncd 				
				Summary of Bitgen Options:
				+----------------------+----------------------+
				| Option Name          | Current Setting      |
				+----------------------+----------------------+
				| Compress             | (Not Specified)*     |
				+----------------------+----------------------+
				| Readback             | (Not Specified)*     |
				+----------------------+----------------------+
				| DebugBitstream       | No**                 |
				+----------------------+----------------------+
				| ConfigRate           | 4**                  |
				+----------------------+----------------------+
				| StartupClk           | Cclk**               |
				+----------------------+----------------------+
				| CclkPin              | Pullup**             |
				+----------------------+----------------------+
				| DonePin              | Pullup**             |
				+----------------------+----------------------+
				| M0Pin                | Pullup**             |
				+----------------------+----------------------+
				| M1Pin                | Pullup**             |
				+----------------------+----------------------+
				| M2Pin                | Pullup**             |
				+----------------------+----------------------+
				| ProgPin              | Pullup**             |
				+----------------------+----------------------+
				| TckPin               | Pullup**             |
				+----------------------+----------------------+
				| TdiPin               | Pullup**             |
				+----------------------+----------------------+
				| TdoPin               | Pullup               |
				+----------------------+----------------------+
				| TmsPin               | Pullup**             |
				+----------------------+----------------------+
				| UnusedPin            | Pullnone             |
				+----------------------+----------------------+
				| GSR_cycle            | 6**                  |
				+----------------------+----------------------+
				| GWE_cycle            | 6**                  |
				+----------------------+----------------------+
				| GTS_cycle            | 5**                  |
				+----------------------+----------------------+
				| LCK_cycle            | NoWait**             |
				+----------------------+----------------------+
				| DONE_cycle           | 4**                  |
				+----------------------+----------------------+
				| Persist              | No*                  |
				+----------------------+----------------------+
				| DriveDone            | No**                 |
				+----------------------+----------------------+
				| DonePipe             | No**                 |
				+----------------------+----------------------+
				| Security             | None**               |
				+----------------------+----------------------+
				| UserID               | 0xFFFFFFFF**         |
				+----------------------+----------------------+
				| Gclkdel0             | 11111**              |
				+----------------------+----------------------+
				| Gclkdel1             | 11111**              |
				+----------------------+----------------------+
				| Gclkdel2             | 11111**              |
				+----------------------+----------------------+
				| Gclkdel3             | 11111**              |
				+----------------------+----------------------+
				| ActiveReconfig       | No*                  |
				+----------------------+----------------------+
				| ActivateGclk         | No*                  |
				+----------------------+----------------------+
				| PartialMask0         | (Not Specified)*     |
				+----------------------+----------------------+
				| PartialMask1         | (Not Specified)*     |
				+----------------------+----------------------+
				| PartialGclk          | (Not Specified)*     |
				+----------------------+----------------------+
				| PartialLeft          | (Not Specified)*     |
				+----------------------+----------------------+
				| PartialRight         | (Not Specified)*     |
				+----------------------+----------------------+
				| IEEE1532             | No*                  |
				+----------------------+----------------------+
				| Binary               | No**                 |
				+----------------------+----------------------+
				 *  Default setting.
				 ** The specified setting matches the default setting.
				
				Running DRC.				DRC detected 0 errors and 0 warnings.				Creating bit map...				Saving bit stream in "uart.bit".				Bitstream generation is complete.							

相关资源