#------------------------------------------------------------------------------
#
# File : cardbus_5632_modelsim.do
# Last Modification: 12/15/2003
#
# Created In SpDE Version: SpDE 9.5.1
# Author : QuickLogic Corporation
# Copyright (C) 2003, Licensed customers of QuickLogic may copy and modify
# this file for use in designing with QuickLogic devices only.
#
# Description :
# This script runs cardbus_5632 verilog reference design prelayout simulation in ModelSim.
#
# History:
# Date Author Version
# 12/15/03 Claire Pian Tu 1.0
# - Initial release
#------------------------------------------------------------------------------
# Change this path to your source file directory
set curpath d:/project/CardBus/Source/verilog
set primitivepath d:/pasic/spde/data/ql5632-33/pci32_25um/v1_0
set top_level_module cardbus_5632.v
set top_level_tb cardbus_5632.tf
# before running this script you should change your current directory
# in ModelSim to where the simulation files are by using the "cd" command
#get out of current directory
cd
#get to the desired directory
cd $curpath
# create work library
vlib work
# compile QL5632-33 PCI core simulation model files
# you might need to add the drive letter to make it look like {c:/pasic/spde/...}
vlog -work work $primitivepath/pci3233_25um.v
# compile QL5022-33 reference design files
vlog -work work $top_level_module
# compile test bench files
vlog -work work $top_level_tb
# start simulation
# you will see many "Too few port connections" warnings. this is okay.
vsim -t 100ps work.t
# open a waveform window
view wave
# add PCI signals
add wave /t/PERRN
add wave /t/SERRN
add wave /t/PAR
add wave /t/REQN
add wave /t/GNTN
add wave /t/RSTN
add wave /t/CLK
add wave /t/IDSEL
add wave -format Literal -radix hexadecimal /t/AD(31:0)
add wave -format Literal -radix hexadecimal /t/CBEN(3:0)
add wave /t/FRAMEN
add wave /t/IRDYN
add wave /t/DEVSELN
add wave /t/TRDYN
add wave /t/STOPN
#cmd_monitor signals
add wave cmd_mon_1/test_state
add wave cmd_mon_1/pci_cmd
add wave cmd_mon_1/pci_cmd_l
add wave cmd_mon_1/config_add
add wave cmd_mon_1/mem_address
# run simulation till end
onbreak resume
run -all
#write transcript pci5022_144pre.doc
#quit -f
