这个是一个基于FPGA的SDRAM控制器系统

				/******************************************************************************
				*
				*  LOGIC CORE:          SDR SDRAM Controller - Global Constants			
				*  MODULE NAME:         params()
				*  COMPANY:             Northwest Logic, Inc.
				*
				*  REVISION HISTORY:  
				*
				*    Revision 1.0  03/24/2000
				*    Description: Initial Release.
				*
				*
				*  FUNCTIONAL DESCRIPTION:
				*
				*  This file defines a number of global constants used throughout
				*  the SDR SDRAM Controller.
				*
				*
				******************************************************************************/
				
				
				// Address Space Parameters
				
				`define ROWSTART        8           
				`define ROWSIZE         11
				`define COLSTART        0
				`define COLSIZE         8
				`define BANKSTART       19
				`define BANKSIZE        2
				
				// Address and Data Bus Sizes
				
				`define  ASIZE           21      // total address width of the SDRAM
				`define  DSIZE           32      // Width of data bus to SDRAMS