一个完整的用cpld实现串口功能的代码。经过验证

				Flow Status : Successful - Sat Feb 18 12:32:17 2006
				Quartus II Version : 5.0 Build 148 04/26/2005 SJ Full Version
				Revision Name : UART
				Top-level Entity Name : UART
				Family : MAX II
				Device : EPM1270T144C5
				Timing Models : Final
				Met timing requirements : N/A
				Total logic elements : 195 / 1,270 ( 15 % )
				Total pins : 14 / 116 ( 12 % )
				Total virtual pins : 0
				UFM blocks : 0 / 1 ( 0 % )