dp_xiliux 的 CPLD Verilog设计实验,串口演示.代码测试通过.

源代码在线查看: __filesallclean.fac

软件大小: 120 K
上传用户: yyjpu
关键词: dp_xiliux Verilog CPLD 设计实验
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相关代码

				Creating TCL Process
				Cleaning Up Project
				deleting file(s): __projnav.log
				deleting file(s): tmperr.err automake.err
				deleting file(s): send.ngd
				deleting file(s): __send_2prj_exewrap.rsp _ngdbld.rsp ngdbuild.rsp _cpldfit.rsp __filesAllClean_exewrap.rsp
				deleting file(s): send.ngc
				deleting file(s): send.prj
				deleting file(s): send.xst
				deleting file(s): send.syr
				deleting file(s): send._prj
				deleting file(s): send.bld
				deleting file(s): send_ngdbuild.nav
				deleting directory: _ngo
				deleting file(s): send.jed
				deleting file(s): send.gyd
				deleting file(s): send.pnx
				deleting file(s): send.rpt
				deleting file(s): send.vm6
				deleting file(s): _cpldfit.tcl
				Finished cleaning up project
							

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