摄像头的硬件函数

				-cdslib ../bin/cds.lib				-hdlvar ../bin/hdl.var				-logfile ../log/ncvlog.log				-update				-messages				-INCDIR ../../../bench/verilog				-INCDIR ../../../rtl/verilog				-DEFINE SIM				../../../rtl/verilog/camera_async_reset_flop.v				../../../rtl/verilog/camera_cb_table.v				../../../rtl/verilog/camera_cr_table.v				../../../rtl/verilog/camera_fifo.v				../../../rtl/verilog/camera_fifo_ctrl.v				../../../rtl/verilog/camera_io_calc.v				../../../rtl/verilog/camera_sync_ctrl.v				../../../rtl/verilog/camera_top.v				../../../rtl/verilog/camera_tpram.v				../../../rtl/verilog/camera_wb_if.v				../../../rtl/verilog/camera_y_table.v				../../../rtl/verilog/camera_synchronizer_flop.v								../../../bench/verilog/wb_master32.v				../../../bench/verilog/wb_master_behavioral.v				../../../bench/verilog/wb_slave_behavioral.v				../../../bench/verilog/camera_bench_top.v				../../../../../../lib/xilinx/lib/glbl/glbl.v				../../../../../../lib/xilinx/lib/unisims/RAMB4_S16_S16.v				../../../../../../lib/xilinx/lib/unisims/RAMB4_S16.v				../../../../../../lib/xilinx/lib/unisims/RAM16X1D.v