一个圣诞彩灯控制芯片的vrilog源代码

				Flow Status : Successful - Thu Nov 17 10:07:59 2005
				Quartus II Version : 5.0 Build 148 04/26/2005 SJ Full Version
				Revision Name : top
				Top-level Entity Name : top
				Family : APEX20KE
				Device : EP20K200EFC484-2X
				Timing Models : Final
				Met timing requirements : N/A
				Total logic elements : 492 / 8,320 ( 5 % )
				Total pins : 9 / 376 ( 2 % )
				Total virtual pins : 0
				Total memory bits : 0 / 106,496 ( 0 % )
				Total PLLs : 0 / 2 ( 0 % )