很好的VHDL源码,里面有不少实用的实例!

				-- Multiplexer 16-to-4 using if-then-elsif-else Statement
				-- download from www.pld.com.cn & www.fpga.com.cn
				
				library ieee;
				use ieee.std_logic_1164.all;
				
				entity mux is port(
				        a, b, c, d:     in std_logic_vector(3 downto 0);
				        s:              in std_logic_vector(1 downto 0);
				        x:              out std_logic_vector(3 downto 0));
				end mux;
				
				architecture archmux of mux is
				begin
				mux4_1: process (a, b, c, d)
				        begin
				                if s = "00" then
				                        x 				                elsif s = "01" then
				                        x 				                elsif s = "10" then
				                        x 				                else
				                        x 				                end if;
				        end process mux4_1;
				end archmux;