2407PID控制程序(附加VB控制界面)超爽!

源代码在线查看: sci2407.h

软件大小: 86 K
上传用户: multicolor
关键词: 2407 PID 控制 程序
下载地址: 免注册下载 普通下载 VIP

相关代码

				/*--------------------------------------------------------*/
				/*  WQ21ST SOFTWARE	STUDIO.			                  	  */
				/*--------------------------------------------------------*/
				/*---------------------------------------------------------------*/
				/* filename:	prot2407.h 					 					 */
				/* original:	08/20/2001   by: WQ								 */
				/* last update: 08/21/2001   by: WQ								 */
				/*---------------------------------------------------------------*/
				
				
				
				
				volatile unsigned int read_atod(unsigned int chan_num);
				void atod_init(void);
				void init_uart1(void);
				unsigned int chk_uart1_xmit_empty(void);
				unsigned int chk_uart1_rec_full(void);
				unsigned int uart1_put_char(unsigned int);
				unsigned int uart1_put_string(unsigned char *);
				unsigned int uart1_get_char(void);
				
				unsigned int read_uart(void);
				unsigned int write_uart( unsigned int);
				
				unsigned int write_string(unsigned char *out_string );
				
				
				unsigned int wait_ms( volatile unsigned int delay_val );
				
				
				unsigned int DacCalibrate( void ) ;
				
				
				void set_pll( void );    
				/*---------------------------------------------------------------*/
				/*  WQ21ST SOFTWARE	STUDIO.			                  	         */
				/*---------------------------------------------------------------*/
				/*---------------------------------------------------------------*/
				
				
				
				/*#define SCSR1	     0x7018*/ 
				
				
				
				#define ADC_CLKEN    0x0080
				#define SCI_CLKEN    0x0040
				#define SPI_CLKEN    0x0020
				#define CAN_CLKEN    0x0010
				#define EVB_CLKEN    0x0008
				#define EVA_CLKEN    0x0004
				
				
				
				/*
				  I/O register addresses
				*/
				#define OCRA          0x7090
				#define MCRB	      0x7092
				
				#define MCRB0	      0x0001
				#define MCRB1	      0x0002
				
				#define ISRA          0x7094
				#define ISRB          0x7096
				
				#define PADATDIR      0x7098
				
				#define PBDATDIR      0x709A
				
				#define PCDATDIR      0x709C
				
				#define IOPC0	      0x0001
				#define IOPC1	      0x0002
				#define C0DIR	      0x0100
				#define C1DIR	      0x0200
				
				
				#define PDDATDIR      0x709E
				/*
				   OCRA & OCRB bit definitions
				*/
				#define OPA0          0x0001
				#define TXD_FUNCTION  0x0001
				#define OPA1          0x0002
				#define RXD_FUNCTION  0x0002
				#define OPA2          0x0004
				#define OPA3          0x0008
				#define OPA4          0x0010
				#define OPA5          0x0020
				#define OPA6          0x0040
				#define OPA7          0x0080
				#define OPA8          0x0100
				#define OPA9          0x0200
				#define OPA10         0x0400
				#define OPA11         0x0800
				#define OPA12         0x1000
				#define OPA13         0x2000
				#define OPA14         0x4000
				#define OPA15         0x8000
				
				#define OPB0          0x0001
				#define OPB1          0x0002
				#define OPB2          0x0004
				#define OPB3          0x0008
				#define OPB4          0x0010
				#define OPB5          0x0020
				#define OPB6          0x0040
				#define OPB7          0x0080
				#define OPB8          0x0100
				#define OPB9          0x0200
				#define OPB10         0x0400
				#define OPB11         0x0800
				#define OPB12         0x1000
				#define OPB13         0x2000
				#define OPB14         0x4000
				#define OPB15         0x8000
				
				/*
				  IO register bit definitions
				*/
				#define IOPx0         0x0001
				#define IOPx1         0x0002
				#define IOPx2         0x0004
				#define IOPx3         0x0008
				#define IOPx4         0x0010
				#define IOPx5         0x0020
				#define IOPx6         0x0040
				#define IOPx7         0x0080
				
				#define x0DIR         0x0100
				#define x1DIR         0x0200
				#define x2DIR         0x0400
				#define x3DIR         0x0800
				#define x4DIR         0x1000
				#define x5DIR         0x2000
				#define x6DIR         0x4000
				#define x7DIR         0x8000
				
				 /*--------------------------------------------------------*/
				/*  WQ21ST SOFTWARE	STUDIO.			                  	  */
				/*--------------------------------------------------------*/
				/*--------------------------------------------------------*/
				/* run test include file				 				  */
				/*							 							  */
				/* filename:	run_test.h				 				  */
				/* original:	07/22/2001     by: WQ					  */
				/* last update: 08/29/2001     by: WQ			          */
				/*--------------------------------------------------------*/
				
				#define NO_RUN  0x0000
				#define RUN     0x0001
				
				
				#define TEST1	   RUN	    /* data space ram test	  */
				#define TEST2	   RUN	    /* code space ram test	  */
				#define TEST3	   RUN	    /* onchip uart loopback test  */
				#define TEST4	   RUN	    /* dac loopback test	  */
				#define TEST5	   RUN	    /* led test 		  */
				#define TEST6	   RUN	    /* latch led test		  */
				#define TEST7	   RUN	    /* dip switch test		  */
				
				  /*--------------------------------------------------------*/
				/*  WQ21ST SOFTWARE	STUDIO.			                  	  */
				/*--------------------------------------------------------*/
				
				/*
				 * Baud Rate Calculations/Definitions
				 */
				
				/* #define BAUD_9600 0x0103 */
				
				#define BAUD_9600    383
								  /* 29.4912 MHz SYSCLK 	*/
								  /* baud = 29,491,200 /[383 + 1] * 8	*/
								  /* baud = 29,491,200 / 384 * 8	*/
								  /* baud = 29,491,200 / 3072		*/
								  /* baud = 9600.000			*/
								  /* % error = [9600-9600] /9600	*/
								  /* % error = 0.0			*/
								  /*----------for reference ------------*/
								  /* 20 MHz	= 20 MHz SYSCLK 	*/
								  /* baud = 20,000,000 /[259 + 1] * 8	*/
								  /* baud = 20,000,000 / 260 * 8	*/
								  /* baud = 20,000,000 / 2080		*/
				                                  /* baud = 9615.384                    */
				                                  /* % error = [9615-9600] /9600        */
				                                  /* % error = 15 / 9600                */
				                                  /* % error = 0.0015625                */
				
				
				/********************************************************************/
				/*  Serial Communications Interface Module for C24X,243,2407	    */
				/********************************************************************/
				struct sci
				{
				  unsigned int  ccr;              /* 0x7050 in data space */
				  unsigned int  ctl1;             /* 0x7051 in data space */
				  unsigned int  baud_hi;          /* 0x7052 in data space */
				  unsigned int  baud_lo;          /* 0x7053 in data space */
				  unsigned int  ctl2;             /* 0x7054 in data space */
				  unsigned int  rxst;             /* 0x7055 in data space */
				  unsigned int  rxemu;            /* 0x7056 in data space */
				  unsigned int  rxbuf;            /* 0x7057 in data space */
				  unsigned int  res1;             /* 0x7058 in data space */
				  unsigned int  txbuf;            /* 0x7059 in data space */
				  unsigned int  res2;             /* 0x705a in data space */
				  unsigned int  res3;             /* 0x705b in data space */
				  unsigned int  res4;             /* 0x705c in data space */
				  unsigned int	res5;		  /* 0x705d in data space */
				  unsigned int	res6;		  /* 0x705e in data space */
				  unsigned int  pri;              /* 0x705f in data space */
				};
				
				/*
				   This module defines the bit positions in various sci registers. For other
				   registers more definitions are needed.
				*/
				
				/*
				  SCInCCR
				*/
				#define STOP_BITS    0x80
				#define PARITY       0x40
				#define PARITY_EN    0x20
				#define LOOP_BACK    0x10
				#define ADDR_IDLE    0x08
				#define SCI_CHAR2    0x04
				#define SCI_CHAR1    0x02
				#define SCI_CHAR0    0x01
				
				/*
				  SCInCTL1
				*/
				#define CRL1_RES1    0x80
				#define RXERR        0x40
				#define SW_RESET     0x20
				#define CRL1_RES2    0x10
				#define TXWAKE       0x08
				#define SLEEP        0x04
				#define TX_ENA       0x02
				#define RX_ENA       0x01
				/*
				  SCInCTL2
				*/
				#define TX_RDY	     0x80
				#define TX_EMPTY     0x40
				#define CRL2_RES3    0x20
				#define CRL2_RES2    0x10
				#define CRL2_RES1    0x08
				#define CRL2_RES0    0x04
				#define RX_INT_EN    0x02
				#define TX_INT_EN    0x01
				/*
				  SCInRXST
				*/
				#define RXERROR      0x80
				#define RXRDY        0x40
				#define BRKDT        0x20
				#define FE           0x10
				#define OE           0x08
				#define PE           0x04
				#define RXWAKE       0x02
				#define RXST_RES1    0x01
				
				
				
				/*
				  SCInPRI
				*/
				#define PRI_RES0        0x80
				#define PRI_TXPRI       0x40
				#define PRI_RXPRI       0x20
				#define PRI_SOFT	0x10
				#define PRI_FREE	0x08
				#define PRI_RES2        0x04
				#define PRI_RES3        0x02
				#define PRI_RES4        0x01
				
				
				/********************************************************************/
				/*  Define pointers to memory mapped peripherals                    */
				/********************************************************************/
				#define SCI  ((volatile struct sci *)  0x07050)
				
				
				 /*--------------------------------------------------------*/
				/*  WQ21ST SOFTWARE	STUDIO.			                  	  */
				/*--------------------------------------------------------*/
				/*
				
				/*
				  Macro Expansion Declarations
				*/
				#define _WSGR	   0FFFFh      /* wait state generator reg in I/O space */
				
				#define STR(x) #x
				
				#define OUTMAC(address,data)  \
				 asm("        LDPK    _"STR(data));  \
				 asm("        OUT     _"STR(data) "," STR(address))
				
				#define INMAC(address,data)   \
				 asm("        LDPK    _"STR(data));  \
				 asm("        IN      _"STR(data) "," STR(address))
				
				 /*--------------------------------------------------------*/
				/*  WQ21ST SOFTWARE	STUDIO.			                  	  */
				/*--------------------------------------------------------*/
				/*---------------------------------------------------------*/
				/*   Header file for EVM2407 Hardware Dependent Routines   */
				/*	Includes: CAN Bus				   */
				/*		  Switches				   */
				/*		  LEDS					   */
				/*		  Internal UART 			   */
				/*		  External Memory			   */
				/*---------------------------------------------------------*/
				/*   Target: EVM320C2407  Assy:504880			   */
				/*---------------------------------------------------------*/
				/*---------------------------------------------------------------*/
				/* filename:	sys2407.h 					 					 */
				/* original:	08/21/2001   by: WQ								 */
				/* last update: 08/27/2001   by: WQ								 */
				/*---------------------------------------------------------------*/
				
				
				
				#define UINT16	     unsigned short
				#define UINT8	     unsigned char
				
				#define GREG		   0x0005	  /* location of GREG Register	  */
				
				
				#define LOW_BYTE_MASK	   0x00FF	  /* Mask out upper byte keep low  */
				#define HIGH_BYTE_MASK	   0xFF00	  /* Mask out lower byte keep high */
				
				#define BYTE0		   0x0000	  /* Byte 0 is low byte  D0-D7	   */
				#define BYTE1		   0x0001	  /* Byte 1 is high byte D8-D15    */
				
				
				
				/* Wait State Bits */
				
				#define PSWSB0	0x0001
				#define PSWSB1	0x0002
				#define PSWSB2	0x0004
				#define DSWSB0	0x0008
				#define DSWSB1	0x0010
				#define DSWSB2	0x0020
				#define IOWSB0	0x0048
				#define IOWSB1	0x0080
				#define IOWSB2	0x0100
				
				
				
				
				
				
							

相关资源