FPGA-CPLD_DesignTool(8-9-10)源代码

				# XST (Creating Lso File) : 
				i2c.lso
				# xst flow : RunXST
				i2c.syr
				i2c.prj
				i2c.sprj
				i2c.ana
				i2c.stx
				i2c.cmd_log
				i2c.ngc
				i2c.ngr
				# Implmentation : Translate
				__projnav/ngdbuild.err
				__projnav/ednTOngd_tcl.rsp
				d:\my_design\example-10-1\i2c\xst\i2c/_ngo
				i2c.ngd
				i2c_ngdbuild.nav
				i2c.bld
				.untf
				i2c.cmd_log
				# Implementation : Map
				i2c_map.ncd
				i2c.ngm
				i2c.pcf
				i2c.nc1
				i2c.mrp
				i2c_map.mrp
				i2c.mdf
				__projnav/map.log
				i2c.cmd_log
				MAP_NO_GUIDE_FILE_CPF "i2c"
				# Implementation : Generate Post-Map Simulation Model
				i2c_map.vhd
				i2c_map.sdf
				i2c_map.sdf
				i2c_map.vhd
				i2c_map.nlf
				i2c.map_nlf
				i2c.vhdsim_map
				i2c.cmd_log
				__projnav/netgen_map_tcl.rsp
				# Implmentation : Post-Place & Route Timing
				__projnav/ncdTOtwr_tcl.rsp
				__projnav/posttrc.log
				i2c.twr
				i2c.twx
				i2c.tsi
				i2c.cmd_log
				# Implmentation : Place & Route
				__projnav/nc1TOncd_tcl.rsp
				i2c.ncd
				i2c.par
				i2c.pad
				i2c_pad.txt
				i2c_pad.csv
				i2c.pad_txt
				i2c.dly
				reportgen.log
				i2c.xpi
				i2c.grf
				i2c.itr
				i2c_last_par.ncd
				__projnav/par.log
				i2c.placed_ncd_tracker
				i2c.routed_ncd_tracker
				i2c.cmd_log
				PAR_NO_GUIDE_FILE_CPF "i2c"
				# Implementation : Generate Post-Par Simulation Model
				i2c_timesim.vhd
				i2c_timesim.sdf
				i2c_timesim.sdf
				i2c_timesim.vhd
				i2c_timesim.nlf
				i2c.par_nlf
				i2c.vhdsim_par
				i2c.cmd_log
				__projnav/netgen_par_tcl.rsp