Release 7.1i par H.38 Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. WHW:: Thu May 29 23:58:50 2008 par -w -intstyle ise -ol std -t 1 top_map.ncd top.ncd top.pcf Constraints file: top.pcf. Loading device for application Rf_Device from file '3s400.nph' in environment
C:/Xilinx. "top" is an NCD, version 3.1, device xc3s400, package pq208, speed -4 Initializing temperature to 85.000 Celsius. (default - Range: 0.000 to 85.000
Celsius) Initializing voltage to 1.140 Volts. (default - Range: 1.140 to 1.260 Volts) Device speed data version: "PRODUCTION 1.35 2005-01-22". Device Utilization Summary: Number of BUFGMUXs 4 out of 8 50% Number of External IOBs 23 out of 141 16% Number of LOCed IOBs 23 out of 23 100% Number of Slices 232 out of 3584 6% Number of SLICEMs 0 out of 1792 0% Overall effort level (-ol): Standard (set by user) Placer effort level (-pl): Standard (set by user) Placer cost table entry (-t): 1 Router effort level (-rl): Standard (set by user) Starting Placer Phase 1.1 Phase 1.1 (Checksum:989c13) REAL time: 2 secs Phase 2.31 Phase 2.31 (Checksum:1312cfe) REAL time: 2 secs Phase 3.2 . Phase 3.2 (Checksum:1c9c37d) REAL time: 2 secs Phase 4.8 ........... Phase 4.8 (Checksum:9aefab) REAL time: 2 secs Phase 5.5 Phase 5.5 (Checksum:2faf07b) REAL time: 2 secs Phase 6.18 Phase 6.18 (Checksum:39386fa) REAL time: 3 secs Phase 7.5 Phase 7.5 (Checksum:42c1d79) REAL time: 3 secs Writing design to file top.ncd Total REAL time to Placer completion: 3 secs Total CPU time to Placer completion: 2 secs Starting Router Phase 1: 1512 unrouted; REAL time: 3 secs Phase 2: 1402 unrouted; REAL time: 3 secs Phase 3: 560 unrouted; REAL time: 4 secs Phase 4: 0 unrouted; REAL time: 4 secs WARNING:CLK Net:XLXI_3/clkdiv may have excessive skew because 2 CLK pins and 1 NON_CLK pins failed to route using a CLK template. WARNING:CLK Net:XLXI_2/count may have excessive skew because 8 CLK pins and 1 NON_CLK pins failed to route using a CLK template. WARNING:CLK Net:XLXI_3/clk_int may have excessive skew because 1 NON-CLK pins failed to route using a CLK template. WARNING:CLK Net:XLXI_4/rx_released may have excessive skew because 19 NON-CLK pins failed to route using a CLK template. Total REAL time to Router completion: 4 secs Total CPU time to Router completion: 4 secs Generating "PAR" statistics. ************************** Generating Clock Report ************************** +---------------------+--------------+------+------+------------+-------------+ | Clock Net | Resource |Locked|Fanout|Net Skew(ns)|Max Delay(ns)| +---------------------+--------------+------+------+------------+-------------+ | XLXI_1/clk | BUFGMUX5| No | 69 | 0.040 | 1.073 | +---------------------+--------------+------+------+------------+-------------+ | XLXI_3/clk_int | BUFGMUX3| No | 19 | 0.001 | 1.015 | +---------------------+--------------+------+------+------------+-------------+ | XLXI_4/rx_released | BUFGMUX4| No | 23 | 0.001 | 1.034 | +---------------------+--------------+------+------+------------+-------------+ | clk_BUFGP | BUFGMUX2| No | 7 | 0.000 | 1.014 | +---------------------+--------------+------+------+------------+-------------+ | XLXI_2/count | Local| | 9 | 0.511 | 1.425 | +---------------------+--------------+------+------+------------+-------------+ | XLXI_3/tc_clkcnt | Local| | 1 | 0.000 | 0.512 | +---------------------+--------------+------+------+------------+-------------+ | XLXI_3/clkdiv | Local| | 3 | 0.375 | 1.492 | +---------------------+--------------+------+------+------------+-------------+ INFO:Par:340 - The Delay report will not be generated when running non-timing driven PAR
with effort level Standard or Medium. If a delay report is required please do
one of the following: 1) use effort level High, 2) use the following
environment variable "XIL_PAR_GENERATE_DLY_REPORT", 3) create Timing
constraints for the design. Generating Pad Report. All signals are completely routed. Total REAL time to PAR completion: 5 secs Total CPU time to PAR completion: 5 secs Peak Memory Usage: 82 MB Placement: Completed - No errors found. Routing: Completed - No errors found. Number of error messages: 0 Number of warning messages: 0 Number of info messages: 1 Writing design to file top.ncd PAR done!
