《FPGA数字电子系统设计与开发实例导航》的配套光盘

				set -tmpdir __projnav
				set -xsthdpdir ./xst
				run
				-ifn can_top.prj
				-ifmt mixed
				-ofn can_top
				-ofmt NGC
				-p xc2s300e-6-pq208
				-top can_top
				-opt_mode Speed
				-opt_level 1
				-iuc NO
				-lso can_top.lso
				-keep_hierarchy NO
				-glob_opt AllClockNets
				-rtlview Yes
				-read_cores YES
				-write_timing_constraints NO
				-cross_clock_analysis NO
				-hierarchy_separator _
				-bus_delimiter 
				-case maintain
				-slice_utilization_ratio 100
				-verilog2001 YES
				-vlgincdir 
				-fsm_extract YES -fsm_encoding Auto
				-fsm_style lut
				-ram_extract Yes
				-ram_style Auto
				-rom_extract Yes
				-rom_style Auto
				-mux_extract YES
				-mux_style Auto
				-decoder_extract YES
				-priority_extract YES
				-shreg_extract YES
				-shift_extract YES
				-xor_collapse YES
				-resource_sharing YES
				-mult_style lut
				-iobuf YES
				-max_fanout 100
				-bufg 4
				-register_duplication YES
				-equivalent_register_removal YES
				-register_balancing No
				-slice_packing YES
				-optimize_primitives NO
				-iob auto
				-slice_utilization_ratio_maxmargin 5