利用FPGA实现DDS经过编译没有错误。编译环境为QuartusII7.2

				-- megafunction wizard: %LPM_ROM%
				-- GENERATION: STANDARD
				-- VERSION: WM1.0
				-- MODULE: altsyncram 
				
				-- ============================================================
				-- File Name: sin_rom.tdf
				-- Megafunction Name(s):
				-- 			altsyncram
				-- ============================================================
				-- ************************************************************
				-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
				--
				-- 6.0 Build 178 04/27/2006 SJ Full Version
				-- ************************************************************
				
				
				--Copyright (C) 1991-2006 Altera Corporation
				--Your use of Altera Corporation's design tools, logic functions 
				--and other software and tools, and its AMPP partner logic 
				--functions, and any output files any of the foregoing 
				--(including device programming or simulation files), and any 
				--associated documentation or information are expressly subject 
				--to the terms and conditions of the Altera Program License 
				--Subscription Agreement, Altera MegaCore Function License 
				--Agreement, or other applicable license agreement, including, 
				--without limitation, that your use is for the sole purpose of 
				--programming logic devices manufactured by Altera and sold by 
				--Altera or its authorized distributors.  Please refer to the 
				--applicable agreement for further details.
				
				INCLUDE "altsyncram.inc";
				
				
				
				SUBDESIGN sin_rom
				(
					address[11..0]	 : INPUT;
					clock	 : INPUT;
					q[11..0]	 : OUTPUT;
				)
				
				VARIABLE
				
					altsyncram_component : altsyncram WITH (
							ADDRESS_ACLR_A = "NONE",
							INIT_FILE = "sin.mif",
							INTENDED_DEVICE_FAMILY = "Cyclone",
							LPM_HINT = "ENABLE_RUNTIME_MOD=YES, INSTANCE_NAME=NONE",
							LPM_TYPE = "altsyncram",
							NUMWORDS_A = 4096,
							OPERATION_MODE = "ROM",
							OUTDATA_ACLR_A = "NONE",
							OUTDATA_REG_A = "CLOCK0",
							WIDTHAD_A = 12,
							WIDTH_A = 12,
							WIDTH_BYTEENA_A = 1
							);
				
				BEGIN
				
					q[11..0] = altsyncram_component.q_a[11..0];
					altsyncram_component.clock0 = clock;
					altsyncram_component.address_a[11..0] = address[11..0];
				END;
				
				
				
				-- ============================================================
				-- CNX file retrieval info
				-- ============================================================
				-- Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0"
				-- Retrieval info: PRIVATE: AclrAddr NUMERIC "0"
				-- Retrieval info: PRIVATE: AclrByte NUMERIC "0"
				-- Retrieval info: PRIVATE: AclrOutput NUMERIC "0"
				-- Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC "0"
				-- Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8"
				-- Retrieval info: PRIVATE: BlankMemory NUMERIC "0"
				-- Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0"
				-- Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0"
				-- Retrieval info: PRIVATE: Clken NUMERIC "0"
				-- Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC "0"
				-- Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_A"
				-- Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC "0"
				-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone"
				-- Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "1"
				-- Retrieval info: PRIVATE: JTAG_ID STRING "NONE"
				-- Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0"
				-- Retrieval info: PRIVATE: MIFfilename STRING "sin.mif"
				-- Retrieval info: PRIVATE: NUMWORDS_A NUMERIC "4096"
				-- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
				-- Retrieval info: PRIVATE: RegAddr NUMERIC "1"
				-- Retrieval info: PRIVATE: RegOutput NUMERIC "1"
				-- Retrieval info: PRIVATE: SingleClock NUMERIC "1"
				-- Retrieval info: PRIVATE: UseDQRAM NUMERIC "0"
				-- Retrieval info: PRIVATE: WidthAddr NUMERIC "12"
				-- Retrieval info: PRIVATE: WidthData NUMERIC "12"
				-- Retrieval info: CONSTANT: ADDRESS_ACLR_A STRING "NONE"
				-- Retrieval info: CONSTANT: INIT_FILE STRING "sin.mif"
				-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone"
				-- Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=YES, INSTANCE_NAME=NONE"
				-- Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram"
				-- Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "4096"
				-- Retrieval info: CONSTANT: OPERATION_MODE STRING "ROM"
				-- Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE"
				-- Retrieval info: CONSTANT: OUTDATA_REG_A STRING "CLOCK0"
				-- Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "12"
				-- Retrieval info: CONSTANT: WIDTH_A NUMERIC "12"
				-- Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1"
				-- Retrieval info: USED_PORT: address 0 0 12 0 INPUT NODEFVAL address[11..0]
				-- Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL clock
				-- Retrieval info: USED_PORT: q 0 0 12 0 OUTPUT NODEFVAL q[11..0]
				-- Retrieval info: CONNECT: @address_a 0 0 12 0 address 0 0 12 0
				-- Retrieval info: CONNECT: q 0 0 12 0 @q_a 0 0 12 0
				-- Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0
				-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
				-- Retrieval info: GEN_FILE: TYPE_NORMAL sin_rom.tdf TRUE
				-- Retrieval info: GEN_FILE: TYPE_NORMAL sin_rom.inc TRUE
				-- Retrieval info: GEN_FILE: TYPE_NORMAL sin_rom.cmp FALSE
				-- Retrieval info: GEN_FILE: TYPE_NORMAL sin_rom.bsf TRUE FALSE
				-- Retrieval info: GEN_FILE: TYPE_NORMAL sin_rom_inst.tdf FALSE