本CD-ROM包括《Verilog-HDL实践与应用系统设计》一书中的全部例子

				set _rspFileHandle [open _cpldfit.rsp w]
				puts $_rspFileHandle "-p xc9536-5-PC44"
				puts $_rspFileHandle "-optimize speed"
				puts $_rspFileHandle "-loc on"
				puts $_rspFileHandle "-slew fast"
				puts $_rspFileHandle "-init low"
				if {[string compare "Template Controlled" "Template Controlled"]==0} {
				puts $_rspFileHandle "-pterms 25" } else {
				puts $_rspFileHandle "-pterms Template Controlled" }
				puts $_rspFileHandle "-power std"
				if {1} {
				puts $_rspFileHandle "-localfbk"
				}
				if {1} {
				puts $_rspFileHandle "-pinfbk"
				}
				puts $_rspFileHandle "-inputs 36"
				close $_rspFileHandle
				set _ErrorCode [catch {exec cpldfit -f _cpldfit.rsp CNT4.ngd} _Results]
				exeputs $_Results
				exit $_ErrorCode