MP3播放器详细设计方案

源代码在线查看: board.h

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关键词: MP3 播放器 详细设计 方案
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相关代码

				/*H**************************************************************************
				* $RCSfile: board.h,v $         
				*----------------------------------------------------------------------------
				* Copyright (c) 2002 Atmel.
				*----------------------------------------------------------------------------
				* RELEASE:      $Name: DEMO_FAT_1_9_9 $      
				* REVISION:     $Revision: 1.12 $     
				* FILE_CVSID:   $Id: board.h,v 1.12 2002/09/06 13:08:21 njourdan Exp $       
				*----------------------------------------------------------------------------
				* PURPOSE:
				* This file contains the demonstration board definition
				*****************************************************************************/
				
				#ifndef _BOARD_H_
				#define _BOARD_H_
				
				
				/*_____ I N C L U D E S ____________________________________________________*/
				
				#include "..\lib\kbd\kbd_drv.h"             /* keyboard driver definition */
				
				/*_____ M A C R O S ________________________________________________________*/
				
				
				/*----- Board definition -----*/
				
				/* BOARD VERSION */
				#define VERSION         22                  /* V2.1 or V2.2 */
				
				/* LCD */
				#define LCD_CMD_ADD     0x8880              /* Command register address */
				#define LCD_DAT_ADD     0xC881              /* Data register address */
				
				/* DAC */
				#define DAC_MUTE        P4_3                /* DAC mute port */
				#define DAC_DEEM        P3_7                /* DAC de-emphasis port */
				#define DAC_CLK         P3_1                /* DAC CSEL port */
				#define DAC_NB_BIT      20                  /* 20-bit DAC */
				
				/* ADC */
				#define AD_CLOCK        (FPER / F_CONV_MAX / 2) /* ADC clock divider */
				#define BATTERY_CHANNEL ((Byte)0x01)        /* ADC battery channel 1 */
				#define VOICE_CHANNEL   ((Byte)0x00)        /* ADC voice channel 0 */
				
				/* ECP Interface */
				#define ECP_CTRL        P3                  /* Control port */
				#define ECP_DATA        P5                  /* Data port */
				#define ECP_PCLK        P3_0                /* PeriphClk signal */
				#define ECP_PACK        P3_1                /* PeriphAck signal */
				#define ECP_1284        P3_2                /* 1284_Active signal */
				#define ECP_HCLK        P3_3                /* HostClk signal */
				#define ECP_HACK        P3_4                /* HostAck signal */
				#define ECP_NRRV        P3_5                /* nReverseRequest signal */
				#define ECP_NARV        P3_7                /* nAckReverse signal */
				#define ECP_NEGO        ((Byte)0x10)        /* negociation ECP byte */
				
				/* DataFlash Memories */
				#if VERSION == 21
				  #define DF_4_MB                           /* AT45DB321 Memories */
				#else
				  #define DF_8_MB                           /* AT45DB642 Memories */
				#endif
				#define DF_CS           P4                  /* dataflash CS# port */
				#define DF_CS0          P4_4
				#define DF_CS1          P4_5
				#define DF_CS2          P4_6
				#define DF_CS3          P4_7
				#define DF_DESEL_ALL    ((Byte)0xF0)        /* set CS# dataflash memories */
				#define DF_NB_MEM       ((Byte)4)           /* 4 on-board memories */
				
				/* MultiMediaCard */
				#define MM_MAX_CARDS    2                   /* number of maximum on-board cards */
				
				/* NAND Flash (SMC extended version) */
				/* ALE = A9
				   CLE = A8
				   WP# = A10
				   CS# = P2.3/A11
				   R/B#= P2.4/A12
				*/
				#define SMC_IDLE_STATE_ADD        0x1C      /* Smart Media Card not selected */
				#define SMC_ADD_LATCH_ENABLE_ADD  0x2600    /* Address Latch Enable Address */
				#define SMC_CMD_LATCH_ENABLE_ADD  0x2500    /* Command Latch Enable Address */
				#define SMC_ADDRESS_CMD_DATA      0x2400    /* Command / Data Address register */
				#define SMC_RD_BUSY               P2_4
				#define Smc_CS_ON()               (P2_3 = 0)
				#define Smc_CS_OFF()              (P2_3 = 1)
				
				#define NF_IDLE_STATE_ADD         0x1C      /* Smart Media Card not selected */
				#define NF_ADD_LATCH_ENABLE_ADD   0x2600    /* Address Latch Enable Address */
				#define NF_CMD_LATCH_ENABLE_ADD   0x2500    /* Command Latch Enable Address */
				#define NF_ADDRESS_CMD_DATA       0x2400    /* Command / Data Address register */
				#define NF_RD_BUSY                P2_4
				#define Nf_CS_ON()                (P2_3 = 0)
				#define Nf_CS_OFF()               (P2_3 = 1)
				
				
				/* Key Definition */
				#define KEY_SOUND       KEY_0_0             /* sound select */
				#define KEY_MEM         KEY_0_1             /* memory select */
				#define KEY_SPARE       KEY_0_2             /*  */
				#define KEY_REPEAT      KEY_0_3             /* repeat set / unset */
				#define KEY_PARENT      KEY_0_3             /* parent directory */
				
				#define KEY_INC         KEY_1_0             /* + */
				#define KEY_PREV        KEY_1_1             /* Previous */
				#define KEY_NEXT        KEY_1_2             /* Next */
				#define KEY_PLAY        KEY_1_3             /* Play or enter directory */
				#define KEY_PAUSE       KEY_1_3             /* Pause */
				#define KEY_ENTER       KEY_1_3             /* Enter in menu */
				
				#define KEY_DEC         KEY_2_0             /* - */
				#define KEY_REC         KEY_2_1             /* Record */
				#define KEY_DEL         KEY_2_1             /* Delete */
				#define KEY_STOP        KEY_2_2             /* Stop */
				#define KEY_MODE        KEY_2_2             /* mode change */
				
				
				/*_____ D E F I N I T I O N ________________________________________________*/
				
				
				/*_____ D E C L A R A T I O N ______________________________________________*/
				
				
				#endif    /* _BOARD_H_ */
				
							

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