VHDL流水灯程序

源代码在线查看: leda.flow.rpt

软件大小: 382 K
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关键词: VHDL 流水灯 程序
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相关代码

				Flow report for LEDA
				Wed Apr 14 21:14:11 2010
				Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
				
				
				---------------------
				; Table of Contents ;
				---------------------
				  1. Legal Notice
				  2. Flow Summary
				  3. Flow Settings
				  4. Flow Non-Default Global Settings
				  5. Flow Elapsed Time
				  6. Flow OS Summary
				  7. Flow Log
				
				
				
				----------------
				; Legal Notice ;
				----------------
				Copyright (C) 1991-2009 Altera Corporation
				Your use of Altera Corporation's design tools, logic functions 
				and other software and tools, and its AMPP partner logic 
				functions, and any output files from any of the foregoing 
				(including device programming or simulation files), and any 
				associated documentation or information are expressly subject 
				to the terms and conditions of the Altera Program License 
				Subscription Agreement, Altera MegaCore Function License 
				Agreement, or other applicable license agreement, including, 
				without limitation, that your use is for the sole purpose of 
				programming logic devices manufactured by Altera and sold by 
				Altera or its authorized distributors.  Please refer to the 
				applicable agreement for further details.
				
				
				
				+-----------------------------------------------------------------------------------+
				; Flow Summary                                                                      ;
				+------------------------------------+----------------------------------------------+
				; Flow Status                        ; Successful - Wed Apr 14 21:14:11 2010        ;
				; Quartus II Version                 ; 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition ;
				; Revision Name                      ; LEDA                                         ;
				; Top-level Entity Name              ; LEDA                                         ;
				; Family                             ; Cyclone II                                   ;
				; Device                             ; EP2C8Q208C8                                  ;
				; Timing Models                      ; Final                                        ;
				; Met timing requirements            ; Yes                                          ;
				; Total logic elements               ; 75 / 8,256 ( < 1 % )                         ;
				;     Total combinational functions  ; 75 / 8,256 ( < 1 % )                         ;
				;     Dedicated logic registers      ; 39 / 8,256 ( < 1 % )                         ;
				; Total registers                    ; 39                                           ;
				; Total pins                         ; 9 / 138 ( 7 % )                              ;
				; Total virtual pins                 ; 0                                            ;
				; Total memory bits                  ; 0 / 165,888 ( 0 % )                          ;
				; Embedded Multiplier 9-bit elements ; 0 / 36 ( 0 % )                               ;
				; Total PLLs                         ; 0 / 2 ( 0 % )                                ;
				+------------------------------------+----------------------------------------------+
				
				
				+-----------------------------------------+
				; Flow Settings                           ;
				+-------------------+---------------------+
				; Option            ; Setting             ;
				+-------------------+---------------------+
				; Start date & time ; 04/14/2010 21:14:00 ;
				; Main task         ; Compilation         ;
				; Revision Name     ; LEDA                ;
				+-------------------+---------------------+
				
				
				+----------------------------------------------------------------------------------------------------------------------------------+
				; Flow Non-Default Global Settings                                                                                                 ;
				+------------------------------------+----------------------------------------------+---------------+-------------+----------------+
				; Assignment Name                    ; Value                                        ; Default Value ; Entity Name ; Section Id     ;
				+------------------------------------+----------------------------------------------+---------------+-------------+----------------+
				; COMPILER_SIGNATURE_ID              ; 0.127125084003404                            ; --            ; --          ; --             ;
				; MAX_CORE_JUNCTION_TEMP             ; 85                                           ; --            ; --          ; --             ;
				; MIN_CORE_JUNCTION_TEMP             ; 0                                            ; --            ; --          ; --             ;
				; MISC_FILE                          ; G:/做视频教材要用的/VHDL/LED流水灯A/LEDA.dpf ; --            ; --          ; --             ;
				; PARTITION_COLOR                    ; 16764057                                     ; --            ; --          ; Top            ;
				; PARTITION_NETLIST_TYPE             ; SOURCE                                       ; --            ; --          ; Top            ;
				; USE_GENERATED_PHYSICAL_CONSTRAINTS ; Off                                          ; --            ; --          ; eda_blast_fpga ;
				+------------------------------------+----------------------------------------------+---------------+-------------+----------------+
				
				
				+-----------------------------------------------------------------------------------------------------------------------------+
				; Flow Elapsed Time                                                                                                           ;
				+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
				; Module Name             ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
				+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
				; Analysis & Synthesis    ; 00:00:02     ; 1.0                     ; 194 MB              ; 00:00:02                           ;
				; Fitter                  ; 00:00:03     ; 1.0                     ; 195 MB              ; 00:00:03                           ;
				; Assembler               ; 00:00:02     ; 1.0                     ; 165 MB              ; 00:00:01                           ;
				; Classic Timing Analyzer ; 00:00:01     ; 1.0                     ; 123 MB              ; 00:00:01                           ;
				; Total                   ; 00:00:08     ; --                      ; --                  ; 00:00:07                           ;
				+-------------------------+--------------+-------------------------+---------------------+------------------------------------+
				
				
				+---------------------------------------------------------------------------------------+
				; Flow OS Summary                                                                       ;
				+-------------------------+------------------+------------+------------+----------------+
				; Module Name             ; Machine Hostname ; OS Name    ; OS Version ; Processor type ;
				+-------------------------+------------------+------------+------------+----------------+
				; Analysis & Synthesis    ; PC-20100331HEEG  ; Windows XP ; 5.1        ; i1686          ;
				; Fitter                  ; PC-20100331HEEG  ; Windows XP ; 5.1        ; i1686          ;
				; Assembler               ; PC-20100331HEEG  ; Windows XP ; 5.1        ; i1686          ;
				; Classic Timing Analyzer ; PC-20100331HEEG  ; Windows XP ; 5.1        ; i1686          ;
				+-------------------------+------------------+------------+------------+----------------+
				
				
				------------
				; Flow Log ;
				------------
				quartus_map --read_settings_files=on --write_settings_files=off LEDA -c LEDA
				quartus_fit --read_settings_files=off --write_settings_files=off LEDA -c LEDA
				quartus_asm --read_settings_files=off --write_settings_files=off LEDA -c LEDA
				quartus_tan --read_settings_files=off --write_settings_files=off LEDA -c LEDA --timing_analysis_only
				
				
				
							

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