HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptive command pipeline. HSSDRC IP core and IP core testbench has been written on SystemVerilog and has been tested in Modelsim. HSSDRC IP core is licensed under MIT License
资源简介:HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptive command pipeline. HSSDRC IP core and IP core testbench has been written on SystemVerilog and has been tested in Modelsim. HSSDRC IP ...
上传时间: 2017-06-25
上传用户:皇族传媒
资源简介:详细介绍了ALTERA器件的IP CORE以及如何使用SDR SDRAM CONTROL
上传时间: 2016-04-12
上传用户:685
资源简介:bluez is the standed offical bluetooth stack with all lib source under linux.
上传时间: 2014-05-25
上传用户:稀世之宝039
资源简介:This is the machine-generated representation of a Handle Graphics object and its children. Note that handle values may change when these objects are re-created. This may cause problems with any callbacks written to depend on the value o...
上传时间: 2013-12-18
上传用户:miaochun888
资源简介:This CD-ROM is distributed by Kluwer Academic Publishers with ABSOLUTELY NO SUPPORT and NO WARRANTY from Kluwer Academic Publishers. Use or reproduction of the information provided on this CD-ROM for commercial gain is strictly prohibited....
上传时间: 2013-12-25
上传用户:zyt
资源简介:SDRAM Controller For Altera SOPC Builder and NIOS on DE2 kit board
上传时间: 2015-11-25
上传用户:tuilp1a
资源简介:This paper reviews the techniques that have been developed for error control and concealment in the past 10–15 years
上传时间: 2014-01-19
上传用户:familiarsmile
资源简介:PC Host used for controlling and command exchanging to the SPI flash memory controller which enables reading, writing and bulk erasing of SPI flash memories such as ST25p16 and 25p32 used on the WGT624V3 Netgear s router.
上传时间: 2013-12-24
上传用户:小码农lz
资源简介:fpga 8051单片机IP核。This is version 1.3 of the MC8051 IP core
上传时间: 2015-06-12
上传用户:waitingfy
资源简介:8051的内核(vhdl) This is version 1.1. of the MC8051 IP core. 在FPGA上运行.供有精力的人研究.
上传时间: 2013-12-16
上传用户:gdgzhym