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XAPP440 - Xilinx CPLD的上电性能

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  • 标      签: Xilinx XAPP CPLD 440

资 源 简 介

Applying power to a standard logic chip, SRAM, or EPROM, usually results in output pinstracking the applied voltage as it rises. Programmable logic attempts to emulate that behavior,but physics forbids perfect emulation, due to the device programmability. It requires care tospecify the pin behavior, because programmable parts encounter unknown variables – yourdesign and your power environment.

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