The Verilog Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable,it supports the development,verification, synthesis,and testing o ...
/dl/745468.html
标签:
ieee
verilog
上传时间:
2021-11-09
上传用户:kid1423